allplus.map.summary

来自「数字系统设计中的全加器、10进制计数器、2-4译码器、摩尔状态机、2-1路选择器」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Tue Mar 25 23:00:07 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : ALLPLUS
Top-level Entity Name : ALLPLUS
Family : Stratix
Total logic elements : 2
Total pins : 5
Total virtual pins : 0
Total memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0