month.txt

基于VHDL的电子钟 实现一个简单的电子钟

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity month is 
port( 	mh,ml : buffer std_logic_vector (3 downto 0);
      	clk : in std_logic
	carry1: buffer std_logic   --?? buffer
        carry2: buffer integer );
end month;
architecture month_display of month is
begin 
  mh <= "0000"; ml <="0001";
  process(clk)
  begin
	if clk'event  and clk='1' then
	  if ml=9 then
		ml <="0000";
		mh <= mh+1;
	  elsif ml=2 then 
		if mh=1 then
		  mh <= "0000"; ml <="0001";
                  carry1 <= not carry1;
		else ml <= ml+ 1;
                     carry1 <= '0';
		end if;
	  else ml <= ml+1;
               carry1 <= '0';
	  end if;
	end if;
    if mh=0 then
        case ml is
         when 1=>carry2<=3;when 2=>carry2<=1; when 3=>carry2<=3;
         when 4=>carry2<=2;when 5=>carry2<=3; when 6=>carry2<=2;
         when 7=>carry2<=3; when 8=>carry2<=3;when 9=>carry2<=2;
        when others=>null;
    end case;
    elsif mh=1 then
      if ml=1 then carry2<=2;
       else carry2<=3;
       end if;
     end if;

   end process;
end month_display;