clock.fit.summary

基于VHDL的电子钟 实现一个简单的电子钟

Fitter Status : Successful - Wed May 07 15:08:57 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : clock
Top-level Entity Name : clock
Family : Cyclone
Device : EP1C3T144C8
Timing Models : Final
Total logic elements : 158 / 2,910 ( 5 % )
Total pins : 13 / 104 ( 13 % )
Total virtual pins : 0
Total memory bits : 0 / 59,904 ( 0 % )
Total PLLs : 0 / 1 ( 0 % )