i2c.ucf

清华大学verilog hdl源码例子

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "clock"  LOC = "p80"  ;
NET "i2c_rdata<0>"  LOC = "p14"  ;
NET "i2c_rdata<1>"  LOC = "p18"  ;
NET "i2c_rdata<2>"  LOC = "p16"  ;
NET "i2c_rdata<3>"  LOC = "p21"  ;
NET "i2c_rdata<4>"  LOC = "p23"  ;
NET "i2c_rdata<5>"  LOC = "p27"  ;
NET "i2c_rdata<6>"  LOC = "p30"  ;
NET "i2c_rdata<7>"  LOC = "p33"  ;
NET "rst_l"  LOC = "p163"  ;
NET "scl_pin"  LOC = "p37"  ;
NET "sda_pin"  LOC = "p35"  ;

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE