📄 decoder.bld

📁 清华大学verilog hdl源码例子

💻 BLD

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Release 6.2i - ngdbuild G.28Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.Command Line: ngdbuild -intstyle ise -dd
f:\trainsilicon\fpgaschool\testcade\fpga40xc200\basic1\examples\decoder\ise\deco
der/_ngo -uc decoder.ucf -p xc2s200-pq208-6 decoder.ngc decoder.ngd Reading NGO file
"f:/trainsilicon/fpgaschool/testcade/fpga40xc200/basic1/examples/decoder/ise/dec
oder/decoder.ngc" ...Reading component libraries for design expansion...Annotating constraints to design from file "decoder.ucf" ...Checking timing specifications ...Checking expanded design ...NGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   0Total memory usage is 38076 kilobytesWriting NGD file "decoder.ngd" ...Writing NGDBUILD log file "decoder.bld"...

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