📄 rom_32x8.bld

📁 清华大学verilog hdl源码例子

💻 BLD

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Release 6.2i - ngdbuild G.28Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.Command Line: ngdbuild -intstyle ise -dd
f:\trainsilicon\fpgaschool\testcade\fpga40xc200\basic2\lcm\ise\lcm/_ngo -i -p
xc2s200-pq208-5 rom_32x8.ngc rom_32x8.ngd Reading NGO file
"f:/trainsilicon/fpgaschool/testcade/fpga40xc200/basic2/lcm/ise/lcm/rom_32x8.ngc
" ...Reading component libraries for design expansion...Checking timing specifications ...Checking expanded design ...NGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   0Total memory usage is 36028 kilobytesWriting NGD file "rom_32x8.ngd" ...Writing NGDBUILD log file "rom_32x8.bld"...

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