prev_cmp_dianzhen.qmsg

基于FPGA的8*8点阵控制

{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_peh.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_peh.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_peh " "Info: Found entity 1: cntr_peh" {  } { { "db/cntr_peh.tdf" "" { Text "D:/altera/72/quartus/projects/dianzhen/db/cntr_peh.tdf" 25 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cntr_peh counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated " "Info: Elaborating entity \"cntr_peh\" for hierarchy \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\"" {  } { { "lpm_counter.tdf" "auto_generated" { Text "d:/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf" 272 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "13 13 " "Info: 13 registers lost all their fanouts during netlist optimizations. The first 13 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[3\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[3\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[4\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[4\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[5\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[5\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[6\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[6\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[7\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[7\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[8\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[8\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[9\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[9\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[10\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[10\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[11\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[11\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[12\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[12\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[13\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[13\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[14\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[14\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[15\] " "Info: Register \"counter:inst1\|lpm_counter:lpm_counter_component\|cntr_peh:auto_generated\|safe_q\[15\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0}  } {  } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0 "" 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "D:/altera/72/quartus/projects/dianzhen/dianzhen.map.smsg " "Info: Generated suppressed messages file D:/altera/72/quartus/projects/dianzhen/dianzhen.map.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "294 " "Info: Implemented 294 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Info: Implemented 8 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "284 " "Info: Implemented 284 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 4 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "148 " "Info: Allocated 148 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Fri Mar 14 01:37:36 2008 " "Info: Processing ended: Fri Mar 14 01:37:36 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Info: Elapsed time: 00:00:13" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Mar 14 01:37:38 2008 " "Info: Processing started: Fri Mar 14 01:37:38 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off dianzhen -c dianzhen " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off dianzhen -c dianzhen" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "dianzhen EP1C3T144C8 " "Info: Selected device EP1C3T144C8 for design \"dianzhen\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0}
{ "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_TOP" "1 0 " "Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use" { { "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_NONE_OVERRIDE" "294 Top " "Info: Previous placement does not exist for 294 of 294 atoms in partition Top" {  } {  } 0 0 "Previous placement does not exist for %1!d! of %1!d! atoms in partition %2!s!" 0 0 "" 0}  } {  } 0 0 "The Fitter has identified %1!d! logical partitions of which %2!d! have a previous placement to use" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C6T144C8 " "Info: Device EP1C6T144C8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "2 " "Info: Fitter converted 2 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ 12 " "Info: Pin ~nCSO~ is reserved at location 12" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ 25 " "Info: Pin ~ASDO~ is reserved at location 25" {  } { { "d:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/72/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0}