📄 vga_colour_bar.vwf

📁 用verilog hdl实现的VGA显示彩条信号
💻 VWF
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/

/*
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/

HEADER
{
	VERSION = 1;
	TIME_UNIT = ns;
	DATA_OFFSET = 0.0;
	DATA_DURATION = 1000.0;
	SIMULATION_TIME = 0.0;
	GRID_PHASE = 0.0;
	GRID_PERIOD = 10.0;
	GRID_DUTY_CYCLE = 50;
}

SIGNAL("B[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("B[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("B[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("B[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("B[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("B[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("B[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("B[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("Cblank")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("G[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("G[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("G[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("G[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("G[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("G[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("G[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("G[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("Hsync")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("R[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("R[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("R[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("R[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("R[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("R[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("R[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("R[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("Vsync")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("clk")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("enmode")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("h_cnt")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 11;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("h_cnt[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_cnt[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "h_cnt";
}

SIGNAL("h_state[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("h_state[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("h_state[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("mode[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("mode[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("rst")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("v_cnt")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 11;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("v_cnt[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_cnt[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "v_cnt";
}

SIGNAL("v_state[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("v_state[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("v_state[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("valid")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

GROUP("R")
{
	MEMBERS = "R[7]", "R[6]", "R[5]", "R[4]", "R[3]", "R[2]", "R[1]", "R[0]";
}

GROUP("mode")
{
	MEMBERS = "mode[1]", "mode[0]";
}

GROUP("B")
{
	MEMBERS = "B[7]", "B[6]", "B[5]", "B[4]", "B[3]", "B[2]", "B[1]", "B[0]";
}

GROUP("G")
{
	MEMBERS = "G[7]", "G[6]", "G[5]", "G[4]", "G[3]", "G[2]", "G[1]", "G[0]";
}

GROUP("h_state")
{
	MEMBERS = "h_state[2]", "h_state[1]", "h_state[0]";
}

GROUP("v_state")
{
	MEMBERS = "v_state[2]", "v_state[1]", "v_state[0]";
}

TRANSITION_LIST("B[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("B[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("B[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("B[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("B[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("B[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("B[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("B[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("Cblank")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("G[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("G[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("G[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("G[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("G[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("G[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("G[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("G[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("Hsync")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("R[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("R[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("R[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("R[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("R[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("R[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("R[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("R[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("Vsync")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("clk")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 100;
			LEVEL 0 FOR 5.0;
			LEVEL 1 FOR 5.0;
		}
	}
}

TRANSITION_LIST("enmode")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("h_cnt[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("h_cnt[9]")
12 下一页
💿 文件大小 441 K
👤 上传用户 houlong111
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#verilog #hdl #VGA #信号
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