hex2led.vhi

用ISE中各种工具设计“运动计时表”.加深对FPGA/CPLD设计流程的理解

-- VHDL Instantiation Created from source file hex2led.vhd -- 18:13:56 12/19/2002
--
-- Notes: 
-- 1) This instantiation template has been automatically generated using types
-- std_logic and std_logic_vector for the ports of the instantiated module
-- 2) To use this template to instantiate this entity, cut-and-paste and then edit

	COMPONENT hex2led
	PORT(
		hex : IN std_logic_vector(3 downto 0);          
		led : OUT std_logic_vector(6 downto 0)
		);
	END COMPONENT;

	Inst_hex2led: hex2led PORT MAP(
		hex => ,
		led => 
	);