parallel_adder_8.v

来自「rs的译码器」· Verilog 代码 · 共 31 行

                                             
//                                                                               
//Design       : Reed-Solomon decoder RS(204,188) in QAM                         
//                                                                               
//File Name    : parallel_adder_8.v                                              
//                                                                               
//Perpose      : parallel_adder_8 performs the addition of two GF(2^8) number   
//               GF(2^8) of D^8 + D^4 + D^3 + D^2 + 1 (Decimal 285)    
//                                                                               
//                                                                               
//Limitations  : None                                                            
//                                                                               

                                                                                 
//synopsys translate_off                                                         
`include  "timescale.v"                                                          
//synopsys translate_on

module parallel_adder_8 ( a,
                          b,
                          c
                         );

input  [7:0]  a;
input  [7:0]  b;
output [7:0]  c;

assign c = a ^ b;        

endmodule