📄 prev_cmp_alarm_clock.fit.qmsg
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{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" { } { } 0 0 "Fitter placement preparation operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" { } { } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" { } { } 0 0 "Fitter placement operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" { } { } 0 0 "Fitter placement was successful" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" { } { } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "6.754 ns register register " "Info: Estimated most critical path is register to register delay of 6.754 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns alarm_counter:u4\|i_current_time\[5\]\[2\] 1 REG LAB_X14_Y10 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X14_Y10; Fanout = 6; REG Node = 'alarm_counter:u4\|i_current_time\[5\]\[2\]'" { } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { alarm_counter:u4|i_current_time[5][2] } "NODE_NAME" } } { "ALARM_COUNTER.vhd" "" { Text "E:/PLDS/CLOCK/ALARM_COUNTER.vhd" 18 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.239 ns) + CELL(0.590 ns) 1.829 ns display_driver:u6\|display_time\[5\]\[2\]~5002 2 COMB LAB_X10_Y7 1 " "Info: 2: + IC(1.239 ns) + CELL(0.590 ns) = 1.829 ns; Loc. = LAB_X10_Y7; Fanout = 1; COMB Node = 'display_driver:u6\|display_time\[5\]\[2\]~5002'" { } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.829 ns" { alarm_counter:u4|i_current_time[5][2] display_driver:u6|display_time[5][2]~5002 } "NODE_NAME" } } { "DISPLAY_DRIVER.vhd" "" { Text "E:/PLDS/CLOCK/DISPLAY_DRIVER.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.116 ns) + CELL(0.590 ns) 2.535 ns display_driver:u6\|display_time\[5\]\[2\]~5003 3 COMB LAB_X10_Y7 7 " "Info: 3: + IC(0.116 ns) + CELL(0.590 ns) = 2.535 ns; Loc. = LAB_X10_Y7; Fanout = 7; COMB Node = 'display_driver:u6\|display_time\[5\]\[2\]~5003'" { } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.706 ns" { display_driver:u6|display_time[5][2]~5002 display_driver:u6|display_time[5][2]~5003 } "NODE_NAME" } } { "DISPLAY_DRIVER.vhd" "" { Text "E:/PLDS/CLOCK/DISPLAY_DRIVER.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.061 ns) + CELL(0.292 ns) 3.888 ns display_driver:u6\|Mux39~18 4 COMB LAB_X10_Y9 1 " "Info: 4: + IC(1.061 ns) + CELL(0.292 ns) = 3.888 ns; Loc. = LAB_X10_Y9; Fanout = 1; COMB Node = 'display_driver:u6\|Mux39~18'" { } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.353 ns" { display_driver:u6|display_time[5][2]~5003 display_driver:u6|Mux39~18 } "NODE_NAME" } } { "DISPLAY_DRIVER.vhd" "" { Text "E:/PLDS/CLOCK/DISPLAY_DRIVER.vhd" 56 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.239 ns) + CELL(0.114 ns) 5.241 ns led_display:U8\|Mux4~170 5 COMB LAB_X11_Y7 1 " "Info: 5: + IC(1.239 ns) + CELL(0.114 ns) = 5.241 ns; Loc. = LAB_X11_Y7; Fanout = 1; COMB Node = 'led_display:U8\|Mux4~170'" { } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.353 ns" { display_driver:u6|Mux39~18 led_display:U8|Mux4~170 } "NODE_NAME" } } { "led_display.vhd" "" { Text "E:/PLDS/CLOCK/led_display.vhd" 20 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.775 ns) + CELL(0.738 ns) 6.754 ns led_display:U8\|clock_out\[2\] 6 REG LAB_X12_Y10 1 " "Info: 6: + IC(0.775 ns) + CELL(0.738 ns) = 6.754 ns; Loc. = LAB_X12_Y10; Fanout = 1; REG Node = 'led_display:U8\|clock_out\[2\]'" { } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.513 ns" { led_display:U8|Mux4~170 led_display:U8|clock_out[2] } "NODE_NAME" } } { "led_display.vhd" "" { Text "E:/PLDS/CLOCK/led_display.vhd" 34 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.324 ns ( 34.41 % ) " "Info: Total cell delay = 2.324 ns ( 34.41 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.430 ns ( 65.59 % ) " "Info: Total interconnect delay = 4.430 ns ( 65.59 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "6.754 ns" { alarm_counter:u4|i_current_time[5][2] display_driver:u6|display_time[5][2]~5002 display_driver:u6|display_time[5][2]~5003 display_driver:u6|Mux39~18 led_display:U8|Mux4~170 led_display:U8|clock_out[2] } "NODE_NAME" } } } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" { } { } 0 0 "Fitter routing operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 5 " "Info: Average interconnect usage is 1% of the available device resources. Peak interconnect usage is 5%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "X0_Y0 X11_Y10 " "Info: The peak interconnect region extends from location X0_Y0 to location X11_Y10" { } { } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0 "" 0} } { } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:02 " "Info: Fitter routing operations ending: elapsed time is 00:00:02" { } { } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" { } { } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0 "" 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" { } { } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0 "" 0} } { } 0 0 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "" 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" { } { } 0 0 "Completed %1!s!" 0 0 "" 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" { } { } 0 0 "Started post-fitting delay annotation" 0 0 "" 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0 0 "Delay annotation completed successfully" 0 0 "" 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" { } { } 0 0 "Completed %1!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "alarm_controller:u3\|Selector0~105 " "Info: Node alarm_controller:u3\|Selector0~105 uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear alarm_controller:u3\|count_a_end " "Info: Port clear -- assigned as a global for destination node alarm_controller:u3\|count_a_end -- routed using non-global resources" { } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { alarm_controller:u3|count_a_end } "NODE_NAME" } } { "ALARM_CONTROLLER.vhd" "" { Text "E:/PLDS/CLOCK/ALARM_CONTROLLER.vhd" 30 -1 0 } } { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { alarm_controller:u3|count_a_end } "NODE_NAME" } } } 0 0 "Port %1!s! -- assigned as a global for destination node %2!s! -- routed using non-global resources" 0 0 "" 0} } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { alarm_controller:u3|Selector0~105 } "NODE_NAME" } } { "ALARM_CONTROLLER.vhd" "" { Text "E:/PLDS/CLOCK/ALARM_CONTROLLER.vhd" 52 -1 0 } } { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { alarm_controller:u3|Selector0~105 } "NODE_NAME" } } } 0 0 "Node %1!s! uses non-global routing resources to route signals to global destination nodes" 0 0 "" 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "E:/PLDS/CLOCK/ALARM_CLOCK.fit.smsg " "Info: Generated suppressed messages file E:/PLDS/CLOCK/ALARM_CLOCK.fit.smsg" { } { } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 30 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 30 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "183 " "Info: Allocated 183 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 13 23:39:45 2008 " "Info: Processing ended: Tue May 13 23:39:45 2008" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:14 " "Info: Elapsed time: 00:00:14" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
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