fir1.hif

基于verilog的FIR滤波器

Version 6.0 Build 178 04/27/2006 SJ Web Edition
35
1731
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
add_tree
# storage
db|FIR1.(1).cnf
db|FIR1.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
add_tree.v
95ea6d63b8a425a3d19d9feb35b21
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
add_tree:r1
add_tree:r2
add_tree:r3
add_tree:r4
add_tree:r5
add_tree:r6
add_tree:r7
add_tree:r8
}
# end
# entity
FIR1
# storage
db|FIR1.(0).cnf
db|FIR1.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
FIR1.v
63ed67d6ca189b1a657619c57656ba9
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
h1
0110
PARAMETER_BIN
DEF
h2
0010
PARAMETER_BIN
DEF
h3
0011
PARAMETER_BIN
DEF
h4
0100
PARAMETER_BIN
DEF
h5
0100
PARAMETER_BIN
DEF
h6
0011
PARAMETER_BIN
DEF
h7
0010
PARAMETER_BIN
DEF
h8
0110
PARAMETER_BIN
DEF
}
# hierarchies {
|
}
# end
# complete