📄 fir1.map.rpt
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; -- 0 input functions ; 0 ;
; -- Combinational cells for routing ; 0 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 62 ;
; -- arithmetic mode ; 39 ;
; -- qfbk mode ; 0 ;
; -- register cascade mode ; 0 ;
; -- synchronous clear/load mode ; 0 ;
; -- asynchronous clear/load mode ; 0 ;
; ; ;
; Total registers ; 45 ;
; Total logic cells in carry chains ; 46 ;
; I/O pins ; 16 ;
; Maximum fan-out node ; clk ;
; Maximum fan-out ; 45 ;
; Total fan-out ; 271 ;
; Average fan-out ; 2.32 ;
+---------------------------------------------+-------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+----------------------------+-------------+--------------+-------------+------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; M4Ks ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ;
+----------------------------+-------------+--------------+-------------+------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
; |FIR1 ; 101 (79) ; 45 ; 0 ; 0 ; 16 ; 0 ; 56 (38) ; 37 (33) ; 8 (8) ; 46 (46) ; 0 (0) ; |FIR1 ;
; |add_tree:r1| ; 4 (4) ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |FIR1|add_tree:r1 ;
; |add_tree:r3| ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |FIR1|add_tree:r3 ;
; |add_tree:r6| ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |FIR1|add_tree:r6 ;
; |add_tree:r8| ; 8 (8) ; 4 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 4 (4) ; 0 (0) ; 0 (0) ; 0 (0) ; |FIR1|add_tree:r8 ;
+----------------------------+-------------+--------------+-------------+------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 45 ;
; Number of registers using Synchronous Clear ; 0 ;
; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 0 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 0 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+----------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |FIR1 ;
+----------------+-------+---------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------+
; h1 ; 0110 ; Binary ;
; h2 ; 0010 ; Binary ;
; h3 ; 0011 ; Binary ;
; h4 ; 0100 ; Binary ;
; h5 ; 0100 ; Binary ;
; h6 ; 0011 ; Binary ;
; h7 ; 0010 ; Binary ;
; h8 ; 0110 ; Binary ;
+----------------+-------+---------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 6.0 Build 178 04/27/2006 SJ Web Edition
Info: Processing started: Tue Jun 05 18:07:58 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off FIR1 -c FIR1
Info: Found 1 design units, including 1 entities, in source file add_tree.v
Info: Found entity 1: add_tree
Info: Found 1 design units, including 1 entities, in source file FIR1.v
Info: Found entity 1: FIR1
Info: Elaborating entity "FIR1" for the top level hierarchy
Info: Elaborating entity "add_tree" for hierarchy "add_tree:r1"
Warning: Port "#0" on the entity instantiation of "r8" is connected to a signal of width 8. The formal width of the signal in the module is 16. Extra bits will be left dangling without any fanout logic.
Warning: Port "#1" on the entity instantiation of "r8" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#2" on the entity instantiation of "r8" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#0" on the entity instantiation of "r7" is connected to a signal of width 8. The formal width of the signal in the module is 16. Extra bits will be left dangling without any fanout logic.
Warning: Port "#1" on the entity instantiation of "r7" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#2" on the entity instantiation of "r7" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#0" on the entity instantiation of "r6" is connected to a signal of width 8. The formal width of the signal in the module is 16. Extra bits will be left dangling without any fanout logic.
Warning: Port "#1" on the entity instantiation of "r6" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#2" on the entity instantiation of "r6" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#0" on the entity instantiation of "r5" is connected to a signal of width 8. The formal width of the signal in the module is 16. Extra bits will be left dangling without any fanout logic.
Warning: Port "#1" on the entity instantiation of "r5" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#2" on the entity instantiation of "r5" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#0" on the entity instantiation of "r4" is connected to a signal of width 8. The formal width of the signal in the module is 16. Extra bits will be left dangling without any fanout logic.
Warning: Port "#1" on the entity instantiation of "r4" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#2" on the entity instantiation of "r4" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#0" on the entity instantiation of "r3" is connected to a signal of width 8. The formal width of the signal in the module is 16. Extra bits will be left dangling without any fanout logic.
Warning: Port "#1" on the entity instantiation of "r3" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#2" on the entity instantiation of "r3" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#0" on the entity instantiation of "r2" is connected to a signal of width 8. The formal width of the signal in the module is 16. Extra bits will be left dangling without any fanout logic.
Warning: Port "#1" on the entity instantiation of "r2" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#2" on the entity instantiation of "r2" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#0" on the entity instantiation of "r1" is connected to a signal of width 8. The formal width of the signal in the module is 16. Extra bits will be left dangling without any fanout logic.
Warning: Port "#1" on the entity instantiation of "r1" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Port "#2" on the entity instantiation of "r1" is connected to a signal of width 4. The formal width of the signal in the module is 8. Extra bits will be driven by GND.
Warning: Reduced register "add_tree:r8|a_temp[13]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[12]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[11]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[10]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[9]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[8]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[6]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[5]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[4]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[3]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[2]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[1]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp[0]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[13]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[12]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[11]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[10]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[9]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[8]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[6]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[5]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[4]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[3]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[2]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[1]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp1[0]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp2[12]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp2[11]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp2[10]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp2[9]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp2[8]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp2[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp2[6]" with stuck data_in port to stuck value GND
Warning: Reduced register "add_tree:r8|a_temp2[5]" with stuck data_in port to stuck value GND
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