fourbitadder.hif

用ＶＨＤＬ来模拟实现钟最终实现数字电子钟的设计

Version 7.2 Build 151 09/26/2007 SJ Full Version
38
2246
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
fourbitadder
# storage
db|fourbitadder.(0).cnf
db|fourbitadder.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
fourbitadder.vhd
1eceda91c462cd8d81b7c26471e4f
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
|
}
# lmf
..|..|..|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
onebitadder
# storage
db|fourbitadder.(1).cnf
db|fourbitadder.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
onebitadder.vhd
a76589d88b33528ccf0774ab4df8d80
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
onebitadder:U0
onebitadder:U1
onebitadder:U2
onebitadder:U3
}
# lmf
..|..|..|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# complete