half_clk.cmp.qrpt

来自「这是序列检测器。串行序列产生是指根据时钟和相应的控制信号」· QRPT 代码 · 共 9 行

[||Compilation Report||Assembler||Assembler Device Options: E:/altera/x/half_clk.sof]
COLUMN_WIDTHS=82L,107L,
OUTPUT_SECTION=1
PAGE_ORIENTATION=0
[||Compilation Report||Assembler||Assembler Generated Files]
COLUMN_WIDTHS=146L,
OUTPUT_SECTION=1
PAGE_ORIENTATION=0