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📄 mem_ctrl1.map.rpt

📁 8读8写SDRAM verilog 程序
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+--------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for wr_sel_pipe:wr_sel_pile1|altshift_taps:w0bufd_rtl_0|shift_taps_psl:auto_generated|altsyncram_4d31:altsyncram4 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                     ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                      ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------+


+-------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: para_mach_d:para_mach_inst ;
+----------------+----------+---------------------------------------------+
; Parameter Name ; Value    ; Type                                        ;
+----------------+----------+---------------------------------------------+
; LockStatus     ; 00000001 ; Binary                                      ;
; PipeDelay      ; 00000010 ; Binary                                      ;
; JudgeInt       ; 00000100 ; Binary                                      ;
; WaitReqIdle    ; 00001000 ; Binary                                      ;
; WaitReqSend    ; 00010000 ; Binary                                      ;
; wait_req_ok    ; 0001     ; Binary                                      ;
; set_req        ; 0010     ; Binary                                      ;
; wait_req_ack   ; 0100     ; Binary                                      ;
+----------------+----------+---------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: sd_if:sd_if1|sd_top:sd_top1|sd_cnfg:u1 ;
+----------------+-------+------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                       ;
+----------------+-------+------------------------------------------------------------+
; idle           ; 0000  ; Binary                                                     ;
; precharge      ; 0001  ; Binary                                                     ;
; refresh1       ; 0011  ; Binary                                                     ;
; nop2           ; 0100  ; Binary                                                     ;
; refresh2       ; 0101  ; Binary                                                     ;
; load_mode      ; 0111  ; Binary                                                     ;
; all_done       ; 1000  ; Binary                                                     ;
+----------------+-------+------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: sd_if:sd_if1|sd_top:sd_top1|sd_state:u2 ;
+----------------+-------+-------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                        ;
+----------------+-------+-------------------------------------------------------------+
; idle           ; 00001 ; Binary                                                      ;
; load           ; 00010 ; Binary                                                      ;
; data           ; 00100 ; Binary                                                      ;
; fresh          ; 01000 ; Binary                                                      ;
; charge         ; 10000 ; Binary                                                      ;
+----------------+-------+-------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: wr_sel_pipe:wr_sel_pile1|altshift_taps:w0bufd_rtl_0 ;
+----------------+----------------+--------------------------------------------------------------------+
; Parameter Name ; Value          ; Type                                                               ;
+----------------+----------------+--------------------------------------------------------------------+
; NUMBER_OF_TAPS ; 1              ; Untyped                                                            ;
; TAP_DISTANCE   ; 3              ; Untyped                                                            ;
; WIDTH          ; 128            ; Untyped                                                            ;
; POWER_UP_STATE ; CLEARED        ; Untyped                                                            ;
; CBXI_PARAMETER ; shift_taps_psl ; Untyped                                                            ;
+----------------+----------------+--------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------+
; altshift_taps Parameter Settings by Entity Instance                              ;
+----------------------------+-----------------------------------------------------+
; Name                       ; Value                                               ;
+----------------------------+-----------------------------------------------------+
; Number of entity instances ; 1                                                   ;
; Entity Instance            ; wr_sel_pipe:wr_sel_pile1|altshift_taps:w0bufd_rtl_0 ;
;     -- NUMBER_OF_TAPS      ; 1                                                   ;
;     -- TAP_DISTANCE        ; 3                                                   ;
;     -- WIDTH               ; 128                                                 ;
+----------------------------+-----------------------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Thu Jan 24 21:29:59 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off mem_ctrl1 -c mem_ctrl1
Info: Found 1 design units, including 1 entities, in source file mem_ctrl1.v
    Info: Found entity 1: mem_ctrl1
Info: Found 1 design units, including 1 entities, in source file para_mach_d.v
    Info: Found entity 1: para_mach_d
Info: Found 1 design units, including 1 entities, in source file rw_sd_mach.v
    Info: Found entity 1: rw_sd_mach
Info: Found 1 design units, including 1 entities, in source file SD_CNFG.V
    Info: Found entity 1: sd_cnfg
Info: Found 1 design units, including 1 entities, in source file sd_if.v
    Info: Found entity 1: sd_if
Info: Found 1 design units, including 1 entities, in source file sd_rfrsh.v
    Info: Found entity 1: sd_rfrsh
Info: Found 1 design units, including 1 entities, in source file sd_sig.v
    Info: Found entity 1: sd_sig
Info: Found 1 design units, including 1 entities, in source file sd_state.v
    Info: Found entity 1: sd_state
Info: Found 1 design units, including 1 entities, in source file sd_top.v
    Info: Found entity 1: sd_top
Info: Found 1 design units, including 1 entities, in source file wr_sel_pipe.v
    Info: Found entity 1: wr_sel_pipe
Info: Elaborating entity "mem_ctrl1" for the top level hierarchy
Info: Elaborating entity "wr_sel_pipe" for hierarchy "wr_sel_pipe:wr_sel_pile1"
Info: Elaborating entity "para_mach_d" for hierarchy "para_mach_d:para_mach_inst"
Info (10264): Verilog HDL Case Statement information at para_mach_d.v(268): all case item expressions in this case statement are onehot
Info (10264): Verilog HDL Case Statement information at para_mach_d.v(307): all case item expressions in this case statement are onehot
Info: Elaborating entity "sd_if" for hierarchy "sd_if:sd_if1"
Info: Elaborating entity "rw_sd_mach" for hierarchy "sd_if:sd_if1|rw_sd_mach:u1"
Info: Elaborating entity "sd_top" for hierarchy "sd_if:sd_if1|sd_top:sd_top1"
Info: Elaborating entity "sd_cnfg" for hierarchy "sd_if:sd_if1|sd_top:sd_top1|sd_cnfg:u1"
Info: Elaborating entity "sd_state" for hierarchy "sd_if:sd_if1|sd_top:sd_top1|sd_state:u2"
Info (10264): Verilog HDL Case Statement information at sd_state.v(64): all case item expressions in this case statement are onehot
Info: Elaborating entity "sd_rfrsh" for hierarchy "sd_if:sd_if1|sd_top:sd_top1|sd_rfrsh:u3"
Info: Elaborating entity "sd_sig" for hierarchy "sd_if:sd_if1|sd_top:sd_top1|sd_sig:u4"
Warning: Port "sd_add" on the entity instantiation of "sd_top1" is connected to a signal of width 11. The formal width of the signal in the module is 12.  Extra bits will be left dangling without any fanout logic.
Warning: Reduced register "para_mach_d:para_mach_inst|mach[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "para_mach_d:para_mach_inst|mach[6]" with stuck data_in port to stuck value GND
Warning: Reduced register "para_mach_d:para_mach_inst|mach[5]" with stuck data_in port to stuck value GND
Warning: Reduced register "para_mach_d:para_mach_inst|req_mach[3]" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_en" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_num[6]" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_num[5]" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_num[4]" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_num[3]" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_num[2]" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_num[1]" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_num[0]" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|op_active" with stuck data_in port to stuck value GND
Warning: Reduced register "sd_if:sd_if1|rw_sd_mach:u1|rs_ready" with stuck data_in port to stuck value GND

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