📄 sd_if.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 01/24/2008 21:36:23
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "sd_if"
BEGIN
DEVICE = "EP1K10QC208-1";
"ch_addr0" : INPUT_PIN = 57 ;
"ch_addr1" : INPUT_PIN = 56 ;
"ch_addr2" : INPUT_PIN = 70 ;
"ch_addr3" : INPUT_PIN = 62 ;
"ch_addr4" : INPUT_PIN = 112 ;
"ch_addr5" : INPUT_PIN = 202 ;
"ch_addr6" : INPUT_PIN = 54 ;
"ch_addr7" : INPUT_PIN = 190 ;
"ch_addr8" : INPUT_PIN = 47 ;
"ch_addr9" : INPUT_PIN = 119 ;
"ch_addr10" : INPUT_PIN = 53 ;
"ch_addr11" : INPUT_PIN = 120 ;
"ch_addr12" : INPUT_PIN = 184 ;
"ch_addr13" : INPUT_PIN = 183 ;
"ch_addr14" : INPUT_PIN = 122 ;
"ch_addr15" : INPUT_PIN = 39 ;
"ch_addr16" : INPUT_PIN = 197 ;
"ch_addr17" : INPUT_PIN = 191 ;
"ch_addr18" : INPUT_PIN = 67 ;
"ch_addr19" : INPUT_PIN = 192 ;
"ch_addr20" : INPUT_PIN = 189 ;
"ch_dqm0" : INPUT_PIN = 95 ;
"ch_dqm1" : INPUT_PIN = 135 ;
"ch_dqm2" : INPUT_PIN = 92 ;
"ch_dqm3" : INPUT_PIN = 64 ;
"ch_dqm4" : INPUT_PIN = 133 ;
"ch_dqm5" : INPUT_PIN = 179 ;
"ch_dqm6" : INPUT_PIN = 168 ;
"ch_dqm7" : INPUT_PIN = 150 ;
"ch_dqm8" : INPUT_PIN = 83 ;
"ch_dqm9" : INPUT_PIN = 161 ;
"ch_dqm10" : INPUT_PIN = 96 ;
"ch_dqm11" : INPUT_PIN = 131 ;
"ch_dqm12" : INPUT_PIN = 208 ;
"ch_dqm13" : INPUT_PIN = 203 ;
"ch_dqm14" : INPUT_PIN = 160 ;
"ch_dqm15" : INPUT_PIN = 127 ;
"ch_num0" : INPUT_PIN = 128 ;
"ch_num1" : INPUT_PIN = 86 ;
"ch_num2" : INPUT_PIN = 170 ;
"ch_num3" : INPUT_PIN = 177 ;
"ch_num4" : INPUT_PIN = 85 ;
"ch_num5" : INPUT_PIN = 87 ;
"ch_num6" : INPUT_PIN = 163 ;
"ch_num7" : INPUT_PIN = 99 ;
"ch_req" : INPUT_PIN = 196 ;
"ch_rw" : INPUT_PIN = 80 ;
"clk" : INPUT_PIN = 79 ;
"rst_l" : INPUT_PIN = 78 ;
"sdram_en" : INPUT_PIN = 182 ;
"ch_ack" : OUTPUT_PIN = 74 ;
"dp_addr0" : OUTPUT_PIN = 19 ;
"dp_addr1" : OUTPUT_PIN = 18 ;
"dp_addr2" : OUTPUT_PIN = 73 ;
"dp_addr3" : OUTPUT_PIN = 75 ;
"dp_addr4" : OUTPUT_PIN = 12 ;
"dp_addr5" : OUTPUT_PIN = 16 ;
"dp_addr6" : OUTPUT_PIN = 186 ;
"dp_addr7" : OUTPUT_PIN = 187 ;
"dp_rden" : OUTPUT_PIN = 207 ;
"dp_wren" : OUTPUT_PIN = 142 ;
"rs_ready" : OUTPUT_PIN = 71 ;
"sd_add0" : OUTPUT_PIN = 41 ;
"sd_add1" : OUTPUT_PIN = 63 ;
"sd_add2" : OUTPUT_PIN = 26 ;
"sd_add3" : OUTPUT_PIN = 44 ;
"sd_add4" : OUTPUT_PIN = 46 ;
"sd_add5" : OUTPUT_PIN = 68 ;
"sd_add6" : OUTPUT_PIN = 69 ;
"sd_add7" : OUTPUT_PIN = 195 ;
"sd_add8" : OUTPUT_PIN = 65 ;
"sd_add9" : OUTPUT_PIN = 38 ;
"sd_add10" : OUTPUT_PIN = 204 ;
"sd_ba0" : OUTPUT_PIN = 11 ;
"sd_ba1" : OUTPUT_PIN = 10 ;
"sd_cas_l" : OUTPUT_PIN = 60 ;
"sd_cke" : OUTPUT_PIN = 116 ;
"sd_cs0_l" : OUTPUT_PIN = 193 ;
"sd_dqm0" : OUTPUT_PIN = 101 ;
"sd_dqm1" : OUTPUT_PIN = 25 ;
"sd_dqm2" : OUTPUT_PIN = 158 ;
"sd_dqm3" : OUTPUT_PIN = 24 ;
"sd_dqm4" : OUTPUT_PIN = 200 ;
"sd_dqm5" : OUTPUT_PIN = 144 ;
"sd_dqm6" : OUTPUT_PIN = 104 ;
"sd_dqm7" : OUTPUT_PIN = 143 ;
"sd_dqm8" : OUTPUT_PIN = 148 ;
"sd_dqm9" : OUTPUT_PIN = 157 ;
"sd_dqm10" : OUTPUT_PIN = 159 ;
"sd_dqm11" : OUTPUT_PIN = 198 ;
"sd_dqm12" : OUTPUT_PIN = 28 ;
"sd_dqm13" : OUTPUT_PIN = 61 ;
"sd_dqm14" : OUTPUT_PIN = 141 ;
"sd_dqm15" : OUTPUT_PIN = 30 ;
"sdram_setup" : OUTPUT_PIN = 136 ;
"sd_ras_l" : OUTPUT_PIN = 205 ;
"sd_we_l" : OUTPUT_PIN = 199 ;
"|rw_sd_mach:u1|lpm_add_sub:410|addcore:adder|:121" : LOCATION = LC1_B2 ;
"|rw_sd_mach:u1|lpm_add_sub:410|addcore:adder|:125" : LOCATION = LC4_B2 ;
"|rw_sd_mach:u1|lpm_add_sub:410|addcore:adder|:129" : LOCATION = LC8_B2 ;
"|rw_sd_mach:u1|lpm_add_sub:410|addcore:adder|:133" : LOCATION = LC4_B6 ;
"|rw_sd_mach:u1|lpm_add_sub:410|addcore:adder|:137" : LOCATION = LC2_B12;
"|rw_sd_mach:u1|lpm_add_sub:410|addcore:adder|:141" : LOCATION = LC4_B12;
"|rw_sd_mach:u1|lpm_add_sub:411|addcore:adder|:121" : LOCATION = LC1_A22;
"|rw_sd_mach:u1|lpm_add_sub:411|addcore:adder|:129" : LOCATION = LC1_A14;
"|rw_sd_mach:u1|lpm_add_sub:411|addcore:adder|:137" : LOCATION = LC7_A14;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:155" : LOCATION = LC7_C20;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:159" : LOCATION = LC2_C20;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:163" : LOCATION = LC2_C23;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:167" : LOCATION = LC1_C23;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:171" : LOCATION = LC1_C15;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:175" : LOCATION = LC2_C15;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:179" : LOCATION = LC5_C18;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:183" : LOCATION = LC6_C18;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:187" : LOCATION = LC2_C18;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:191" : LOCATION = LC6_C13;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:195" : LOCATION = LC3_C13;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:199" : LOCATION = LC4_C13;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:203" : LOCATION = LC4_C14;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:207" : LOCATION = LC2_C17;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:211" : LOCATION = LC1_C17;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:215" : LOCATION = LC8_C17;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:219" : LOCATION = LC5_C21;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:223" : LOCATION = LC7_C21;
"|rw_sd_mach:u1|lpm_add_sub:412|addcore:adder|:227" : LOCATION = LC8_C21;
"|rw_sd_mach:u1|:91" : LOCATION = LC6_B13; -- |rw_sd_mach:u1|op_en
"|rw_sd_mach:u1|:96" : LOCATION = LC8_B13;
"|rw_sd_mach:u1|:100" : LOCATION = LC7_B13; -- |rw_sd_mach:u1|op_active
"|rw_sd_mach:u1|:102" : LOCATION = LC4_B13;
"|rw_sd_mach:u1|:176" : LOCATION = LC5_B12; -- |rw_sd_mach:u1|op_num7
"|rw_sd_mach:u1|:177" : LOCATION = LC3_B12; -- |rw_sd_mach:u1|op_num6
"|rw_sd_mach:u1|:178" : LOCATION = LC2_B6 ; -- |rw_sd_mach:u1|op_num5
"|rw_sd_mach:u1|:179" : LOCATION = LC3_B6 ; -- |rw_sd_mach:u1|op_num4
"|rw_sd_mach:u1|:180" : LOCATION = LC5_B2 ; -- |rw_sd_mach:u1|op_num3
"|rw_sd_mach:u1|:181" : LOCATION = LC3_B2 ; -- |rw_sd_mach:u1|op_num2
"|rw_sd_mach:u1|:182" : LOCATION = LC8_B6 ; -- |rw_sd_mach:u1|op_num1
"|rw_sd_mach:u1|:183" : LOCATION = LC1_B6 ; -- |rw_sd_mach:u1|op_num0
"|rw_sd_mach:u1|:189" : LOCATION = LC8_B12;
"|rw_sd_mach:u1|:194" : LOCATION = LC7_B12;
"|rw_sd_mach:u1|:199" : LOCATION = LC6_B12;
"|rw_sd_mach:u1|:204" : LOCATION = LC2_B2 ;
"|rw_sd_mach:u1|:209" : LOCATION = LC7_B2 ;
"|rw_sd_mach:u1|:214" : LOCATION = LC6_B2 ;
"|rw_sd_mach:u1|~222~1" : LOCATION = LC1_B12;
"|rw_sd_mach:u1|:228" : LOCATION = LC5_B13; -- |rw_sd_mach:u1|op_over
"|rw_sd_mach:u1|:231" : LOCATION = LC2_A24;
"|rw_sd_mach:u1|:236" : LOCATION = LC2_B13;
"|rw_sd_mach:u1|:244" : LOCATION = LC2_C22;
"|rw_sd_mach:u1|:265" : LOCATION = LC8_A24; -- |rw_sd_mach:u1|rs_ready_delay4
"|rw_sd_mach:u1|:266" : LOCATION = LC7_A24; -- |rw_sd_mach:u1|rs_ready_delay3
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