sd_top.rpt

8读8写SDRAM verilog 程序

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24:      3/24( 12%)     2/4( 50%)      1/4( 25%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                            d:\newsdram\sd_top.rpt
sd_top

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       69         clk


Device-Specific Information:                            d:\newsdram\sd_top.rpt
sd_top

** CLEAR SIGNALS **

Type     Fan-out       Name
INPUT       61         rst_l


Device-Specific Information:                            d:\newsdram\sd_top.rpt
sd_top

** EQUATIONS **

add4     : INPUT;
add5     : INPUT;
add6     : INPUT;
add7     : INPUT;
add8     : INPUT;
add9     : INPUT;
add10    : INPUT;
add11    : INPUT;
add12    : INPUT;
add13    : INPUT;
add14    : INPUT;
add15    : INPUT;
add16    : INPUT;
add17    : INPUT;
add18    : INPUT;
add19    : INPUT;
add20    : INPUT;
add21    : INPUT;
add22    : INPUT;
add23    : INPUT;
add24    : INPUT;
byte_en0 : INPUT;
byte_en1 : INPUT;
byte_en2 : INPUT;
byte_en3 : INPUT;
byte_en4 : INPUT;
byte_en5 : INPUT;
byte_en6 : INPUT;
byte_en7 : INPUT;
byte_en8 : INPUT;
byte_en9 : INPUT;
byte_en10 : INPUT;
byte_en11 : INPUT;
byte_en12 : INPUT;
byte_en13 : INPUT;
byte_en14 : INPUT;
byte_en15 : INPUT;
clk      : INPUT;
data_req : INPUT;
rs_ready : INPUT;
rst_l    : INPUT;
sdram_en : INPUT;
wr_l     : INPUT;

-- Node name is 'data_cycle' 
-- Equation name is 'data_cycle', type is output 
data_cycle =  _LC2_B16;

-- Node name is 'sd_add0' 
-- Equation name is 'sd_add0', type is output 
sd_add0  =  _LC1_C24;

-- Node name is 'sd_add1' 
-- Equation name is 'sd_add1', type is output 
sd_add1  =  _LC4_C24;

-- Node name is 'sd_add2' 
-- Equation name is 'sd_add2', type is output 
sd_add2  =  _LC6_C24;

-- Node name is 'sd_add3' 
-- Equation name is 'sd_add3', type is output 
sd_add3  =  _LC6_C21;

-- Node name is 'sd_add4' 
-- Equation name is 'sd_add4', type is output 
sd_add4  =  _LC2_C21;

-- Node name is 'sd_add5' 
-- Equation name is 'sd_add5', type is output 
sd_add5  =  _LC8_C21;

-- Node name is 'sd_add6' 
-- Equation name is 'sd_add6', type is output 
sd_add6  =  _LC5_C21;

-- Node name is 'sd_add7' 
-- Equation name is 'sd_add7', type is output 
sd_add7  =  _LC3_B19;

-- Node name is 'sd_add8' 
-- Equation name is 'sd_add8', type is output 
sd_add8  =  _LC8_C24;

-- Node name is 'sd_add9' 
-- Equation name is 'sd_add9', type is output 
sd_add9  =  _LC2_C24;

-- Node name is 'sd_add10' 
-- Equation name is 'sd_add10', type is output 
sd_add10 =  _LC5_B19;

-- Node name is 'sd_add11' 
-- Equation name is 'sd_add11', type is output 
sd_add11 =  GND;

-- Node name is 'sd_ba0' 
-- Equation name is 'sd_ba0', type is output 
sd_ba0   =  _LC5_B15;

-- Node name is 'sd_ba1' 
-- Equation name is 'sd_ba1', type is output 
sd_ba1   =  _LC4_B15;

-- Node name is 'sd_cas_l' 
-- Equation name is 'sd_cas_l', type is output 
sd_cas_l =  _LC1_B15;

-- Node name is 'sd_cke' 
-- Equation name is 'sd_cke', type is output 
sd_cke   =  _LC7_C19;

-- Node name is 'sd_cs0_l' 
-- Equation name is 'sd_cs0_l', type is output 
sd_cs0_l =  _LC6_B17;

-- Node name is 'sd_dqm0' 
-- Equation name is 'sd_dqm0', type is output 
sd_dqm0  =  _LC7_A12;

-- Node name is 'sd_dqm1' 
-- Equation name is 'sd_dqm1', type is output 
sd_dqm1  =  _LC6_A10;

-- Node name is 'sd_dqm2' 
-- Equation name is 'sd_dqm2', type is output 
sd_dqm2  =  _LC3_A10;

-- Node name is 'sd_dqm3' 
-- Equation name is 'sd_dqm3', type is output 
sd_dqm3  =  _LC1_A12;

-- Node name is 'sd_dqm4' 
-- Equation name is 'sd_dqm4', type is output 
sd_dqm4  =  _LC1_A10;

-- Node name is 'sd_dqm5' 
-- Equation name is 'sd_dqm5', type is output 
sd_dqm5  =  _LC5_A12;

-- Node name is 'sd_dqm6' 
-- Equation name is 'sd_dqm6', type is output 
sd_dqm6  =  _LC2_A12;

-- Node name is 'sd_dqm7' 
-- Equation name is 'sd_dqm7', type is output 
sd_dqm7  =  _LC3_A12;

-- Node name is 'sd_dqm8' 
-- Equation name is 'sd_dqm8', type is output 
sd_dqm8  =  _LC8_A10;

-- Node name is 'sd_dqm9' 
-- Equation name is 'sd_dqm9', type is output 
sd_dqm9  =  _LC4_A10;

-- Node name is 'sd_dqm10' 
-- Equation name is 'sd_dqm10', type is output 
sd_dqm10 =  _LC4_A12;

-- Node name is 'sd_dqm11' 
-- Equation name is 'sd_dqm11', type is output 
sd_dqm11 =  _LC7_A10;

-- Node name is 'sd_dqm12' 
-- Equation name is 'sd_dqm12', type is output 
sd_dqm12 =  _LC8_A12;

-- Node name is 'sd_dqm13' 
-- Equation name is 'sd_dqm13', type is output 
sd_dqm13 =  _LC6_A12;

-- Node name is 'sd_dqm14' 
-- Equation name is 'sd_dqm14', type is output 
sd_dqm14 =  _LC5_A10;

-- Node name is 'sd_dqm15' 
-- Equation name is 'sd_dqm15', type is output 
sd_dqm15 =  _LC2_A10;

-- Node name is 'sdram_setup' 
-- Equation name is 'sdram_setup', type is output 
sdram_setup =  _LC1_B20;

-- Node name is 'sd_ras_l' 
-- Equation name is 'sd_ras_l', type is output 
sd_ras_l =  _LC4_B17;

-- Node name is 'sd_we_l' 
-- Equation name is 'sd_we_l', type is output 
sd_we_l  =  _LC1_B17;

-- Node name is 'state_cntr0' 
-- Equation name is 'state_cntr0', type is output 
state_cntr0 =  _LC7_B15;

-- Node name is 'state_cntr1' 
-- Equation name is 'state_cntr1', type is output 
state_cntr1 =  _LC8_B15;

-- Node name is 'state_cntr2' 
-- Equation name is 'state_cntr2', type is output 
state_cntr2 =  _LC3_B15;

-- Node name is 'state_cntr3' 
-- Equation name is 'state_cntr3', type is output 
state_cntr3 =  _LC1_B19;

-- Node name is 'state_cntr4' 
-- Equation name is 'state_cntr4', type is output 
state_cntr4 =  _LC7_B19;

-- Node name is 'state_cntr5' 
-- Equation name is 'state_cntr5', type is output 
state_cntr5 =  _LC7_B10;

-- Node name is 'state_cntr6' 
-- Equation name is 'state_cntr6', type is output 
state_cntr6 =  _LC5_B10;

-- Node name is 'state_cntr7' 
-- Equation name is 'state_cntr7', type is output 
state_cntr7 =  _LC4_B10;

-- Node name is '|sd_cnfg:u1|:17' = '|sd_cnfg:u1|sdram_en1' 
-- Equation name is '_LC1_B8', type is buried 
_LC1_B8  = DFFE( sdram_en, GLOBAL( clk), GLOBAL( rst_l),  VCC,  VCC);

-- Node name is '|sd_cnfg:u1|:19' = '|sd_cnfg:u1|sdram_en2' 
-- Equation name is '_LC2_B8', type is buried 
_LC2_B8  = DFFE( _LC1_B8, GLOBAL( clk), GLOBAL( rst_l),  VCC,  VCC);

-- Node name is '|sd_cnfg:u1|:176' = '|sd_cnfg:u1|state0' 
-- Equation name is '_LC5_B24', type is buried 
_LC5_B24 = DFFE( _EQ001, GLOBAL( clk), GLOBAL( rst_l),  VCC,  VCC);
  _EQ001 =  _LC2_B24
         #  _LC4_B13
         #  _LC3_B14
         #  _LC6_B24;

-- Node name is '|sd_cnfg:u1|:175' = '|sd_cnfg:u1|state1' 
-- Equation name is '_LC7_B24', type is buried 
_LC7_B24 = DFFE( _EQ002, GLOBAL( clk), GLOBAL( rst_l),  VCC,  VCC);
  _EQ002 =  _LC4_B14