post_norm_arch.vhd

使用VHDL语言描述的单精度浮点处理器。源代码来自国外网站。可实现单精度浮点数的加减乘运算。

                   (NOT exp_out(7) OR (exp_out(7) AND  round2a));

    round2_fmul <= NOT r_sign and 
                (
                        (exp_ovf(1) and not fract_in_00 and
                                ( ((not exp_out1_co or op_dn) and (r or s or (not rem_00 and op_div) )) or fract_out_00 or (not op_dn and not op_div))
                         ) or
                        (
                                (r or s or (not rem_00 and op_div)) and (
                                                (not exp_ovf(1) and (exp_in_80 or not exp_ovf(0))) or op_div or
                                                ( exp_ovf(1) and not exp_ovf(0) and exp_out1_co)
                                        )
                        )
                );

    round2_f2i_p1 <= '1' WHEN (exp_in<X"80" ) ELSE '0';
    round2_f2i <= rmode_10 and (( or_reduce(fract_in(23 DOWNTO 0)) AND
                                  NOT opas AND round2_f2i_p1) OR (or_reduce(fract_trunc)));
   
    round2 <= round2_fmul WHEN ((op_mul or op_div) = '1') ELSE
              round2_f2i WHEN (op_f2i = '1') else
              round2_fasu;

    fract_out_rnd2a <= fract_out_pl1(22 DOWNTO 0)  WHEN (round2 = '1') else fract_out;
    exp_rnd_adj2a <= fract_out_pl1(23)  WHEN (round2 = '1') else '0';
    exp_out_rnd2a <= exp_out_mi1 WHEN ((exp_rnd_adj2a AND (exp_ovf(1) and op_mul))='1')ELSE 
                     exp_out_pl1 WHEN ((exp_rnd_adj2a AND
                                        NOT (exp_ovf(1) AND op_mul))='1') ELSE
                     exp_out;

    fract_out_rnd2 <= "111" & X"FFFFF" WHEN
                      ((r_sign and exp_out_ff and NOT op_div and
                        NOT dn AND  NOT op_f2i) = '1') ELSE
                      fract_out_rnd2a;
    exp_out_rnd2 <= X"FE"  WHEN
                    ((r_sign and exp_out_ff AND NOT op_f2i) = '1')
                    else exp_out_rnd2a;

    -- Choose rounding mode
    PROCESS (rmode,exp_out_rnd0,exp_out_rnd1,exp_out_rnd2)
    BEGIN 
        CASE rmode IS
            WHEN "00" => exp_out_rnd <= exp_out_rnd0;
            WHEN "01" => exp_out_rnd <= exp_out_rnd1;
            WHEN "10" => exp_out_rnd <= exp_out_rnd2;
            WHEN "11" => exp_out_rnd <= exp_out_rnd2;
            WHEN OTHERS => exp_out_rnd <= (OTHERS => 'X');
        END CASE;
    END PROCESS;

    PROCESS (rmode,fract_out_rnd0,fract_out_rnd1,fract_out_rnd2)
    BEGIN 
        CASE rmode IS
            WHEN "00" => fract_out_rnd <= fract_out_rnd0;
            WHEN "01" => fract_out_rnd <= fract_out_rnd1;
            WHEN "10" => fract_out_rnd <= fract_out_rnd2;
            WHEN "11" => fract_out_rnd <= fract_out_rnd2;
            WHEN OTHERS => fract_out_rnd <= (OTHERS => 'X');
        END CASE;
    END PROCESS;

    ---------------------------------------------------------------------------
    -- Final Output Mux
    ---------------------------------------------------------------------------
    -- Fix Output for denormalized and special numbers
    max_num <=  ( not rmode_00 and (op_mul or op_div ) and (
							  ( exp_ovf(1) and  exp_ovf(0)) or
							  (not exp_ovf(1) and not exp_ovf(0) and exp_in_ff and (max_num_t2) and (max_num_t1) )
							  )
		   ) or

		   ( op_div and (
				   ( rmode_01 and ( div_inf or
							 (exp_out_ff and not exp_ovf(1) ) or
							 (exp_ovf(1) and  exp_ovf(0) )
						)
				   ) or
		
				   ( rmode(1) and not exp_ovf(1) and (
								   ( exp_ovf(0) and exp_in_ff and r_sign and fract_in(47)
								   ) or
						
								   (  r_sign and (
										(fract_in(47) and div_inf) or
										(exp_in(7) and not exp_out_rnd(7) and not exp_in_80 and max_num_t3 ) or
										(exp_in(7) and  exp_out_rnd(7) and r_sign and exp_out_ff and op_dn and
											 max_num_t4 )
										)
								   ) or

								   ( exp_in_00 and r_sign and (
												div_inf or
												(r_sign and exp_out_ff and max_num_t2)
											  )
								   )
							       )
				  )
			    )
		   );

    max_num_t2 <= '1' WHEN (fi_ldz_2<"0011000") ELSE '0';
    max_num_t1 <= '1' WHEN (exp_out/=X"fe") ELSE '0';
    max_num_t3 <= '1' WHEN (exp_out/=X"7f") ELSE '0';
    max_num_t4 <= '1' WHEN (div_exp1>"011111110") ELSE '0';
        
    inf_out <= (rmode(1) and (op_mul or op_div) and not r_sign and (	(exp_in_ff and not op_div) or
								(exp_ovf(1) and exp_ovf(0) and (exp_in_00 or exp_in(7)) ) 
							   )
		) or (div_inf and op_div and (
				 rmode_00 or
				(rmode(1) and not exp_in_ff and not exp_ovf(1) and not exp_ovf(0) and not r_sign ) or
				(rmode(1) and not exp_ovf(1) and exp_ovf(0) and exp_in_00 and not r_sign)
				)
		) or (op_div and rmode(1) and exp_in_ff and op_dn and not r_sign and inf_out_t1 );

    inf_out_t1 <= '1' WHEN ((fi_ldz_2 < 24) AND (exp_out_rnd/=X"fe")) ELSE
                  '0';

    fract_out_final <= (OTHERS => '0') when ((inf_out or ovf0 or output_zero ) = '1')ELSE
                       ("111" & X"fffff") WHEN ((max_num or (f2i_max and op_f2i) )= '1') else
                       fract_out_rnd;

    exp_out_final <=  X"00" WHEN (((op_div and exp_ovf(1) and
                                   not exp_ovf(0)) or output_zero )='1') else
                      X"ff" WHEN (((op_div and exp_ovf(1) and
                                   exp_ovf(0) and rmode_00) or inf_out or
                                  (f2i_max and op_f2i) )='1') ELSE
                      X"fe" WHEN (max_num = '1') else
                      exp_out_rnd;

    ---------------------------------------------------------------------------
    -- Pack Result
    ---------------------------------------------------------------------------
    fpout <= exp_out_final & fract_out_final;

    ---------------------------------------------------------------------------
    -- Exceptions
    ---------------------------------------------------------------------------
    z <= shft_co or ( exp_ovf(1) or  exp_in_00) or
         (not exp_ovf(1) and not exp_in_00 and (exp_out1_co or exp_out_00));

    underflow_fmul <= ( (or_reduce(fract_trunc)) and z and not exp_in_ff ) or
                      (fract_out_00 and not fract_in_00 and exp_ovf(1));

    undeflow_div_p1 <= '1' WHEN (exp_out_final/=X"ff") ELSE '0';
    undeflow_div_p2 <= '1' WHEN (exp_in>X"16") ELSE '0';
    undeflow_div_p3 <= '1' WHEN (fi_ldz<"010111") ELSE '0';
    undeflow_div_p4 <= '1' WHEN (exp_in<"00010111") ELSE '0';
    undeflow_div_p5 <= '1' WHEN (exp_in(7)=exp_div(7)) ELSE '0';
    undeflow_div_p6 <= '1' WHEN (exp_div(7 DOWNTO 1)="1111111") ELSE '0';
    undeflow_div_p7 <= '1' WHEN (exp_in<X"7f") ELSE '0';
    undeflow_div_p8 <= '1' WHEN (exp_in>X"20") ELSE '0';
    undeflow_div_p9 <= '1' WHEN (ldz_all<"0010111") ELSE '0';
    undeflow_div_p10 <= '1' WHEN (exp_in=X"01") ELSE '0';
     
    undeflow_div <=   not (exp_ovf(1) and  exp_ovf(0) and rmode_00) and not inf_out and not max_num and undeflow_div_p1 and (

                        ((or_reduce(fract_trunc)) and not opb_dn and (
                                                        ( op_dn and not exp_ovf(1) and exp_ovf(0))     or
                                                        ( op_dn and  exp_ovf(1))                  or
                                                        ( op_dn and  div_shft1_co)                or 
                                                          exp_out_00                            or
                                                          exp_ovf(1)
                                                  )

                        ) or

                        ( exp_ovf(1) and not exp_ovf(0) and (
                                                        (  op_dn and undeflow_div_p2 and undeflow_div_p3 ) or
                                                        (  op_dn and undeflow_div_p4 and undeflow_div_p3 and not rem_00) or
                                                        ( not op_dn and (undeflow_div_p5) and not rem_00) or
                                                        ( not op_dn and exp_in_00 and (undeflow_div_p6) ) or
                                                        ( not op_dn and undeflow_div_p7 and undeflow_div_p8 )
                                                        )
                        ) or

                        (not exp_ovf(1) and not exp_ovf(0) and (
                                                        ( op_dn and undeflow_div_p3 and exp_out_00) or
                                                        ( exp_in_00 and not rem_00) or
                                                        ( not op_dn and undeflow_div_p9 and undeflow_div_p10 and exp_out_00 and not rem_00)
                                                        )
                        )

                        );

    underflow <= (undeflow_div) WHEN (op_div = '1') ELSE
                 (underflow_fmul) when(op_mul ='1') ELSE
                 (NOT dn AND (NOT fract_in(47) AND exp_out1_co));

    overflow_fdiv <=  inf_out or
                      (NOT rmode_00 AND max_num) or
                      (exp_in(7) and op_dn and exp_out_ff) or
                      (exp_ovf(0) and (exp_ovf(1) or exp_out_ff) );

    overflow <= overflow_fdiv WHEN (op_div ='1') else
                (ovf0 or ovf1);

    f2i_ine <= '1' WHEN (((f2i_zero AND NOT fract_in_00 AND NOT opas)='1') OR
                         ((or_reduce(fract_trunc))='1') OR 
                         ((f2i_zero='1') and (exp_in<X"80") and (opas='1') and (fract_in_00='0')) or
                         ((f2i_max='1') and (rmode_11='1') and (exp_in<X"80"))) else '0';

    ine <= f2i_ine WHEN (op_f2i='1') ELSE 
           or_reduce(fract_trunc) WHEN (op_i2f='1') ELSE 
           ((r and NOT dn) or (s and NOT dn) or max_num or (op_div and NOT rem_00));


    ---------------------------------------------------------------------------
    -- Debugging Stuff
    ---------------------------------------------------------------------------
    
    
END arch;