firfilter.map.summary

实现一个FIR滤波器

Analysis & Synthesis Status : Successful - Mon Nov 26 18:38:10 2007
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : firfilter
Top-level Entity Name : firfilter
Family : Stratix II
Logic utilization : N/A
    Combinational ALUTs : 278
    Dedicated logic registers : 570
Total registers : 570
Total pins : 26
Total virtual pins : 0
Total block memory bits : 0
DSP block 9-bit elements : 16
Total PLLs : 0
Total DLLs : 0