scrambler.sim.rpt

来自「通信系统中的加扰与解扰程序」· RPT 代码 · 共 528 行 · 第 1/3 页

; |scrambler|Add0~203  ; |scrambler|Add0~203  ; out0             ;
; |scrambler|Add0~206  ; |scrambler|Add0~206  ; out0             ;
; |scrambler|Add0~209  ; |scrambler|Add0~209  ; out0             ;
; |scrambler|Add0~212  ; |scrambler|Add0~212  ; out0             ;
; |scrambler|Add0~215  ; |scrambler|Add0~215  ; out0             ;
; |scrambler|Add0~218  ; |scrambler|Add0~218  ; out0             ;
; |scrambler|Add0~221  ; |scrambler|Add0~221  ; out0             ;
; |scrambler|Add0~224  ; |scrambler|Add0~224  ; out0             ;
; |scrambler|Add0~227  ; |scrambler|Add0~227  ; out0             ;
; |scrambler|Add0~230  ; |scrambler|Add0~230  ; out0             ;
; |scrambler|Add0~233  ; |scrambler|Add0~233  ; out0             ;
; |scrambler|Add0~236  ; |scrambler|Add0~236  ; out0             ;
; |scrambler|Add0~239  ; |scrambler|Add0~239  ; out0             ;
; |scrambler|Add0~242  ; |scrambler|Add0~242  ; out0             ;
; |scrambler|Add0~245  ; |scrambler|Add0~245  ; out0             ;
; |scrambler|Add0~248  ; |scrambler|Add0~248  ; out0             ;
; |scrambler|Add0~251  ; |scrambler|Add0~251  ; out0             ;
; |scrambler|Add0~254  ; |scrambler|Add0~254  ; out0             ;
+----------------------+----------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+----------------------------------------------------------------+
; Missing 0-Value Coverage                                       ;
+----------------------+----------------------+------------------+
; Node Name            ; Output Port Name     ; Output Port Type ;
+----------------------+----------------------+------------------+
; |scrambler|count~0   ; |scrambler|count~0   ; out              ;
; |scrambler|count~1   ; |scrambler|count~1   ; out              ;
; |scrambler|count~2   ; |scrambler|count~2   ; out              ;
; |scrambler|count~3   ; |scrambler|count~3   ; out              ;
; |scrambler|count~4   ; |scrambler|count~4   ; out              ;
; |scrambler|count~5   ; |scrambler|count~5   ; out              ;
; |scrambler|count~6   ; |scrambler|count~6   ; out              ;
; |scrambler|count~7   ; |scrambler|count~7   ; out              ;
; |scrambler|count~8   ; |scrambler|count~8   ; out              ;
; |scrambler|count~9   ; |scrambler|count~9   ; out              ;
; |scrambler|count~10  ; |scrambler|count~10  ; out              ;
; |scrambler|count~11  ; |scrambler|count~11  ; out              ;
; |scrambler|count~12  ; |scrambler|count~12  ; out              ;
; |scrambler|count~13  ; |scrambler|count~13  ; out              ;
; |scrambler|count~14  ; |scrambler|count~14  ; out              ;
; |scrambler|count~15  ; |scrambler|count~15  ; out              ;
; |scrambler|count~16  ; |scrambler|count~16  ; out              ;
; |scrambler|count~17  ; |scrambler|count~17  ; out              ;
; |scrambler|count~18  ; |scrambler|count~18  ; out              ;
; |scrambler|count~19  ; |scrambler|count~19  ; out              ;
; |scrambler|count~20  ; |scrambler|count~20  ; out              ;
; |scrambler|count~21  ; |scrambler|count~21  ; out              ;
; |scrambler|count~22  ; |scrambler|count~22  ; out              ;
; |scrambler|count~23  ; |scrambler|count~23  ; out              ;
; |scrambler|count~32  ; |scrambler|count~32  ; out              ;
; |scrambler|count~33  ; |scrambler|count~33  ; out              ;
; |scrambler|count~34  ; |scrambler|count~34  ; out              ;
; |scrambler|count~35  ; |scrambler|count~35  ; out              ;
; |scrambler|count~36  ; |scrambler|count~36  ; out              ;
; |scrambler|count~37  ; |scrambler|count~37  ; out              ;
; |scrambler|count~38  ; |scrambler|count~38  ; out              ;
; |scrambler|count~39  ; |scrambler|count~39  ; out              ;
; |scrambler|count~40  ; |scrambler|count~40  ; out              ;
; |scrambler|count~41  ; |scrambler|count~41  ; out              ;
; |scrambler|count~42  ; |scrambler|count~42  ; out              ;
; |scrambler|count~43  ; |scrambler|count~43  ; out              ;
; |scrambler|count~44  ; |scrambler|count~44  ; out              ;
; |scrambler|count~45  ; |scrambler|count~45  ; out              ;
; |scrambler|count~46  ; |scrambler|count~46  ; out              ;
; |scrambler|count~47  ; |scrambler|count~47  ; out              ;
; |scrambler|count~48  ; |scrambler|count~48  ; out              ;
; |scrambler|count~49  ; |scrambler|count~49  ; out              ;
; |scrambler|count~50  ; |scrambler|count~50  ; out              ;
; |scrambler|count~51  ; |scrambler|count~51  ; out              ;
; |scrambler|count~52  ; |scrambler|count~52  ; out              ;
; |scrambler|count~53  ; |scrambler|count~53  ; out              ;
; |scrambler|count~54  ; |scrambler|count~54  ; out              ;
; |scrambler|count~55  ; |scrambler|count~55  ; out              ;
; |scrambler|count[31] ; |scrambler|count[31] ; out              ;
; |scrambler|count[30] ; |scrambler|count[30] ; out              ;
; |scrambler|count[29] ; |scrambler|count[29] ; out              ;
; |scrambler|count[28] ; |scrambler|count[28] ; out              ;
; |scrambler|count[27] ; |scrambler|count[27] ; out              ;
; |scrambler|count[26] ; |scrambler|count[26] ; out              ;
; |scrambler|count[25] ; |scrambler|count[25] ; out              ;
; |scrambler|count[24] ; |scrambler|count[24] ; out              ;
; |scrambler|count[23] ; |scrambler|count[23] ; out              ;
; |scrambler|count[22] ; |scrambler|count[22] ; out              ;
; |scrambler|count[21] ; |scrambler|count[21] ; out              ;
; |scrambler|count[20] ; |scrambler|count[20] ; out              ;
; |scrambler|count[19] ; |scrambler|count[19] ; out              ;
; |scrambler|count[18] ; |scrambler|count[18] ; out              ;
; |scrambler|count[17] ; |scrambler|count[17] ; out              ;
; |scrambler|count[16] ; |scrambler|count[16] ; out              ;
; |scrambler|count[15] ; |scrambler|count[15] ; out              ;
; |scrambler|count[14] ; |scrambler|count[14] ; out              ;
; |scrambler|count[13] ; |scrambler|count[13] ; out              ;
; |scrambler|count[12] ; |scrambler|count[12] ; out              ;
; |scrambler|count[11] ; |scrambler|count[11] ; out              ;
; |scrambler|count[10] ; |scrambler|count[10] ; out              ;
; |scrambler|count[9]  ; |scrambler|count[9]  ; out              ;
; |scrambler|count[8]  ; |scrambler|count[8]  ; out              ;
; |scrambler|Add0~188  ; |scrambler|Add0~188  ; out0             ;
; |scrambler|Add0~191  ; |scrambler|Add0~191  ; out0             ;
; |scrambler|Add0~194  ; |scrambler|Add0~194  ; out0             ;
; |scrambler|Add0~197  ; |scrambler|Add0~197  ; out0             ;
; |scrambler|Add0~200  ; |scrambler|Add0~200  ; out0             ;
; |scrambler|Add0~203  ; |scrambler|Add0~203  ; out0             ;
; |scrambler|Add0~206  ; |scrambler|Add0~206  ; out0             ;
; |scrambler|Add0~209  ; |scrambler|Add0~209  ; out0             ;
; |scrambler|Add0~212  ; |scrambler|Add0~212  ; out0             ;
; |scrambler|Add0~215  ; |scrambler|Add0~215  ; out0             ;
; |scrambler|Add0~218  ; |scrambler|Add0~218  ; out0             ;
; |scrambler|Add0~221  ; |scrambler|Add0~221  ; out0             ;
; |scrambler|Add0~224  ; |scrambler|Add0~224  ; out0             ;
; |scrambler|Add0~227  ; |scrambler|Add0~227  ; out0             ;
; |scrambler|Add0~230  ; |scrambler|Add0~230  ; out0             ;
; |scrambler|Add0~233  ; |scrambler|Add0~233  ; out0             ;
; |scrambler|Add0~236  ; |scrambler|Add0~236  ; out0             ;
; |scrambler|Add0~239  ; |scrambler|Add0~239  ; out0             ;
; |scrambler|Add0~242  ; |scrambler|Add0~242  ; out0             ;
; |scrambler|Add0~245  ; |scrambler|Add0~245  ; out0             ;
; |scrambler|Add0~248  ; |scrambler|Add0~248  ; out0             ;
; |scrambler|Add0~251  ; |scrambler|Add0~251  ; out0             ;
; |scrambler|Add0~254  ; |scrambler|Add0~254  ; out0             ;
+----------------------+----------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Thu Dec 27 08:47:24 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off scrambler -c scrambler
Warning: Wrong node type for node "m_seq[5]" in vector source file. Design node is of type Buried, but signal in vector source file is of type Output.
Warning: Wrong node type for node "m_seq[4]" in vector source file. Design node is of type Buried, but signal in vector source file is of type Output.
Warning: Wrong node type for node "m_seq[3]" in vector source file. Design node is of type Buried, but signal in vector source file is of type Output.
Warning: Wrong node type for node "m_seq[2]" in vector source file. Design node is of type Buried, but signal in vector source file is of type Output.
Warning: Wrong node type for node "m_seq[1]" in vector source file. Design node is of type Buried, but signal in vector source file is of type Output.
Warning: Wrong node type for node "m_seq[0]" in vector source file. Design node is of type Buried, but signal in vector source file is of type Output.
Warning: Wrong node type for node "m_seq[6]" in vector source file. Design node is of type Buried, but signal in vector source file is of type Output.
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|m_seq[5]"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|m_seq[4]"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|m_seq[3]"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|m_seq[2]"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|m_seq[1]"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|m_seq[0]"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|count[1]"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|count[0]"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|seqOut[7]~reg0"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|seqOut[6]~reg0"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|seqOut[5]~reg0"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|seqOut[4]~reg0"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|seqOut[3]~reg0"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|seqOut[2]~reg0"
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|scrambler|m_seq[6]"
Warning: Found clock-sensitive change during active clock edge at time 2.39 us on register "|scrambler|seqOut[0]~reg0"
Warning: Found clock-sensitive change during active clock edge at time 2.4 us on register "|scrambler|seqOut[1]~reg0"
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      62.15 %
Info: Number of transitions in simulation is 99422
Info: Vector file scrambler.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 24 warnings
    Info: Processing ended: Thu Dec 27 08:47:25 2007
    Info: Elapsed time: 00:00:01