tg_count.v

一个圣诞彩灯控制芯片的vrilog源代码

module tg_count(flag,tg,reset);
input tg,reset;
output [2:0] flag;
reg [2:0] flag;
always@(negedge tg or negedge reset)
  begin
    if(reset==1'b0)
       begin
       flag<=3'b000;
       end
    else if(flag==3'd7)
           flag<=3'b000;
          else 
            flag<=flag+3'b001;
  end 
endmodule