model7_top.v

来自「一个圣诞彩灯控制芯片的vrilog源代码」· Verilog 代码 · 共 21 行

//`include "bright_clk.v"
//`include "model7.v"
//`include "model7_huayang.v"
//`include "model7_select.v"
module model7_top(l1,l2,l3,l4,c,en,reset,clk_4);
input  en,reset,clk_4;
output [1:0] l1,l2,l3,l4;
output c;
wire [1:0] l1,l2,l3,l4;
wire c;
wire   [1:0] I0,I1,I2,I3;
wire   en1,c1;

//module model7(l1,l2,l3,l4,c,clk,clk_bright,reset,en);
model7 u1(I0,I1,I2,I3,c1,clk_4,reset,en1);

//module model7_select(l1,l2,l3,l4,c,en1,reset,en,clk,c1,l11,l12,l13,l14);
model7_select u2(l1,l2,l3,l4,c,en1,reset,en,clk_4,c1,I0,I1,I2,I3);

endmodule