top.v

一个圣诞彩灯控制芯片的vrilog源代码

/*`include "sysclk_250k.v"
`include "sysclk.v"
`include "dark_clk.v"
`include "medium_clk.v"
`include "bright_clk.v"
`include "model1.v"
`include "model1_top.v"
`include "model2_fast.v"
`include "model2_slow.v"
`include "model2_select.v"
`include "model2_top.v"
`include "model3_veryslow.v"
`include "model3_fast.v"
`include "model3_select.v"
`include "model3_top.v"
`include "model4_slow.v"
`include "model4_fast.v"
`include "model4_select.v"
`include "model4_top.v"
`include "star_twinkle.v"
`include "model3_slow.v"
`include "model5_3slow_inv.v"
`include "model5_select.v"
`include "model5_top.v"
`include "model6_slow.v"
`include "model6_fast.v"
`include "model6_select.v"
`include "model6_top.v"
`include "model8.v"
`include "model8_top.v"
`include "d.v"
`include "rs.v"
`include "qudou.v"
`include "TG.v"
`include "huayang.v"
`include "clk_select.v"*/

module top(l1,l2,l3,l4,tg,reset,test,osc,zc);
input  tg,reset,test,osc,zc;
output l1,l2,l3,l4;
wire    [1:0] I0,I1,I2,I3,I4,I5,I6,I7,
              I8,I9,I10,I11,I12,I13,I14,I15,
              I16,I17,I18,I19,I20,I21,I22,I23,
              I24,I25,I26,I27,I28,I29,I30,I31;
wire    [6:0] cin;
wire    [7:0] ein;
wire    clk,clk_250k,clk_2,clk_4,clk_8,clk_2k,clk_bright,clk_medium,clk_dark,tg_out;
wire  [1:0] m1,m2,m3,m4;

//module clk_select(clk,test,osc,zc);
clk_select u22(clk,test,osc,zc);

//module sysclk_250k(clk_250k,clk,reset);
sysclk_250k u23(clk_250k,clk,reset);


//module sysclk(clk_2,clk_250k,clk,reset);
sysclk u0(clk_4,clk_8,clk_2k,clk_250k,reset);

//module bright_clk(clk_bright,reset,clk);
bright_clk  u1(clk_bright,reset,clk_2k);

//module medium_clk(clk_medium,reset,clk);
medium_clk  u6(clk_medium,reset,clk_2k);

//module dark_clk(clk_dark,reset,clk);
dark_clk u7(clk_dark,reset,clk_2k);

//module model1_top(l1,l2,l3,l4,c,en,reset,clk_50,clk_250k);
model1_top  u8(I0,I1,I2,I3,cin[0],ein[0],reset,clk_4,clk_8,clk_2k);

//module model2_top(l1,l2,l3,l4,c,en,reset,clk);
model2  u9(I4,I5,I6,I7,cin[1],clk_4,reset,ein[1]);

//module model3_top(l1,l2,l3,l4,c,en,reset,clk);
model3  u10(I8,I9,I10,I11,cin[2],clk_4,reset,ein[2]);

//module model4_top(l1,l2,l3,l4,c,en,reset,clk_2,clk_250k);
model4  u11(I12,I13,I14,I15,cin[3],clk_4,reset,ein[3]);

//module model5_top(l1,l2,l3,l4,c,en,reset,clk);
model5  u12(I16,I17,I18,I19,cin[4],clk_4,reset,ein[4]);
  
//module model6_top(l1,l2,l3,l4,c,en,reset,clk_2,clk_250k);
model6  u13(I20,I21,I22,I23,cin[5],clk_8,reset,ein[5]);

//module model7(l1,l2,l3,l4,c,clk,reset,en);
model7 u14(I24,I25,I26,I27,cin[6],clk_4,reset,ein[6]);

//module model8_top(l1,l2,l3,l4,en,reset,clk);
model8  u15(I28,I29,I30,I31,clk_4,reset,ein[7]);

//module qudou(q,d,clk);
qudou u16(tg_out,tg,clk_4);
 
//module TG(l1,l2,l3,l4,ein,reset,tg,clk,I);
TG  u17(m1,m2,m3,m4,ein,reset,tg_out,clk_2k,I0,I1,I2,I3,I4,I5,I6,I7,
       I8,I9,I10,I11,I12,I13,I14,I15,I16,I17,I18,I19,I20,I21,I22,I23,
       I24,I25,I26,I27,I28,I29,I30,I31);

//module huayang(lout,clk_bright,clk_medium5,clk_medium4,
//        clk_medium3,clk_medium2,clk_medium1,clk_dark,lin);
huayang u18(l1,clk_bright,clk_medium,clk_dark,m1);

huayang u19(l2,clk_bright,clk_medium,clk_dark,m2);

huayang u20(l3,clk_bright,clk_medium,clk_dark,m3);

huayang u21(l4,clk_bright,clk_medium,clk_dark,m4);


endmodule