top.tan.qmsg

一个圣诞彩灯控制芯片的vrilog源代码

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "zc register sysclk:u0\|flag1\[1\] register sysclk:u0\|clk_4 97.1 MHz 10.299 ns Internal " "Info: Clock \"zc\" has Internal fmax of 97.1 MHz between source register \"sysclk:u0\|flag1\[1\]\" and destination register \"sysclk:u0\|clk_4\" (period= 10.299 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.245 ns + Longest register register " "Info: + Longest register to register delay is 9.245 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.209 ns) 0.209 ns sysclk:u0\|flag1\[1\] 1 REG LC5_15_X2 3 " "Info: 1: + IC(0.000 ns) + CELL(0.209 ns) = 0.209 ns; Loc. = LC5_15_X2; Fanout = 3; REG Node = 'sysclk:u0\|flag1\[1\]'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.899 ns) 1.408 ns sysclk:u0\|reduce_nor~116 2 COMB LC9_15_X2 1 " "Info: 2: + IC(0.300 ns) + CELL(0.899 ns) = 1.408 ns; Loc. = LC9_15_X2; Fanout = 1; COMB Node = 'sysclk:u0\|reduce_nor~116'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "1.199 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.689 ns) 2.097 ns sysclk:u0\|reduce_nor~112 3 COMB LC10_15_X2 16 " "Info: 3: + IC(0.000 ns) + CELL(0.689 ns) = 2.097 ns; Loc. = LC10_15_X2; Fanout = 16; COMB Node = 'sysclk:u0\|reduce_nor~112'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.689 ns" { sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.644 ns) + CELL(0.464 ns) 5.205 ns sysclk:u0\|clk_4~1 4 COMB LC9_15_O2 1 " "Info: 4: + IC(2.644 ns) + CELL(0.464 ns) = 5.205 ns; Loc. = LC9_15_O2; Fanout = 1; COMB Node = 'sysclk:u0\|clk_4~1'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.108 ns" { sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.381 ns) + CELL(0.659 ns) 9.245 ns sysclk:u0\|clk_4 5 REG LC10_16_N1 104 " "Info: 5: + IC(3.381 ns) + CELL(0.659 ns) = 9.245 ns; Loc. = LC10_16_N1; Fanout = 104; REG Node = 'sysclk:u0\|clk_4'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "4.040 ns" { sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.920 ns 31.58 % " "Info: Total cell delay = 2.920 ns ( 31.58 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.325 ns 68.42 % " "Info: Total interconnect delay = 6.325 ns ( 68.42 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } { 0.000ns 0.300ns 0.000ns 2.644ns 3.381ns } { 0.209ns 0.899ns 0.689ns 0.464ns 0.659ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.456 ns - Smallest " "Info: - Smallest clock skew is -0.456 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "zc destination 6.860 ns + Shortest register " "Info: + Shortest clock path from clock \"zc\" to destination register is 6.860 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.373 ns) 1.373 ns zc 1 CLK PIN_L6 1 " "Info: 1: + IC(0.000 ns) + CELL(1.373 ns) = 1.373 ns; Loc. = PIN_L6; Fanout = 1; CLK Node = 'zc'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { zc } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.628 ns) + CELL(0.464 ns) 2.465 ns clk_select:u22\|clk~8 2 COMB LC4_7_P2 6 " "Info: 2: + IC(0.628 ns) + CELL(0.464 ns) = 2.465 ns; Loc. = LC4_7_P2; Fanout = 6; COMB Node = 'clk_select:u22\|clk~8'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "1.092 ns" { zc clk_select:u22|clk~8 } "NODE_NAME" } "" } } { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.284 ns) + CELL(0.643 ns) 3.392 ns sysclk_250k:u23\|clk_250k 3 REG LC6_7_P2 19 " "Info: 3: + IC(0.284 ns) + CELL(0.643 ns) = 3.392 ns; Loc. = LC6_7_P2; Fanout = 19; REG Node = 'sysclk_250k:u23\|clk_250k'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.927 ns" { clk_select:u22|clk~8 sysclk_250k:u23|clk_250k } "NODE_NAME" } "" } } { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.468 ns) + CELL(0.000 ns) 6.860 ns sysclk:u0\|clk_4 4 REG LC10_16_N1 104 " "Info: 4: + IC(3.468 ns) + CELL(0.000 ns) = 6.860 ns; Loc. = LC10_16_N1; Fanout = 104; REG Node = 'sysclk:u0\|clk_4'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.468 ns" { sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.480 ns 36.15 % " "Info: Total cell delay = 2.480 ns ( 36.15 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.380 ns 63.85 % " "Info: Total interconnect delay = 4.380 ns ( 63.85 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "6.860 ns" { zc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "6.860 ns" { zc zc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 0.628ns 0.284ns 3.468ns } { 0.000ns 1.373ns 0.464ns 0.643ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "zc source 7.316 ns - Longest register " "Info: - Longest clock path from clock \"zc\" to source register is 7.316 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.373 ns) 1.373 ns zc 1 CLK PIN_L6 1 " "Info: 1: + IC(0.000 ns) + CELL(1.373 ns) = 1.373 ns; Loc. = PIN_L6; Fanout = 1; CLK Node = 'zc'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { zc } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.628 ns) + CELL(0.464 ns) 2.465 ns clk_select:u22\|clk~8 2 COMB LC4_7_P2 6 " "Info: 2: + IC(0.628 ns) + CELL(0.464 ns) = 2.465 ns; Loc. = LC4_7_P2; Fanout = 6; COMB Node = 'clk_select:u22\|clk~8'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "1.092 ns" { zc clk_select:u22|clk~8 } "NODE_NAME" } "" } } { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.284 ns) + CELL(0.643 ns) 3.392 ns sysclk_250k:u23\|clk_250k 3 REG LC6_7_P2 19 " "Info: 3: + IC(0.284 ns) + CELL(0.643 ns) = 3.392 ns; Loc. = LC6_7_P2; Fanout = 19; REG Node = 'sysclk_250k:u23\|clk_250k'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.927 ns" { clk_select:u22|clk~8 sysclk_250k:u23|clk_250k } "NODE_NAME" } "" } } { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.924 ns) + CELL(0.000 ns) 7.316 ns sysclk:u0\|flag1\[1\] 4 REG LC5_15_X2 3 " "Info: 4: + IC(3.924 ns) + CELL(0.000 ns) = 7.316 ns; Loc. = LC5_15_X2; Fanout = 3; REG Node = 'sysclk:u0\|flag1\[1\]'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.924 ns" { sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.480 ns 33.90 % " "Info: Total cell delay = 2.480 ns ( 33.90 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.836 ns 66.10 % " "Info: Total interconnect delay = 4.836 ns ( 66.10 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "7.316 ns" { zc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.316 ns" { zc zc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 0.628ns 0.284ns 3.924ns } { 0.000ns 1.373ns 0.464ns 0.643ns 0.000ns } } }  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "6.860 ns" { zc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "6.860 ns" { zc zc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 0.628ns 0.284ns 3.468ns } { 0.000ns 1.373ns 0.464ns 0.643ns 0.000ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "7.316 ns" { zc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.316 ns" { zc zc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 0.628ns 0.284ns 3.924ns } { 0.000ns 1.373ns 0.464ns 0.643ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.434 ns + " "Info: + Micro clock to output delay of source is 0.434 ns" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.164 ns + " "Info: + Micro setup delay of destination is 0.164 ns" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } { 0.000ns 0.300ns 0.000ns 2.644ns 3.381ns } { 0.209ns 0.899ns 0.689ns 0.464ns 0.659ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "6.860 ns" { zc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "6.860 ns" { zc zc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 0.628ns 0.284ns 3.468ns } { 0.000ns 1.373ns 0.464ns 0.643ns 0.000ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "7.316 ns" { zc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.316 ns" { zc zc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 0.628ns 0.284ns 3.924ns } { 0.000ns 1.373ns 0.464ns 0.643ns 0.000ns } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "qudou:u16\|d:m0\|q tg zc -2.117 ns register " "Info: tsu for register \"qudou:u16\|d:m0\|q\" (data pin = \"tg\", clock pin = \"zc\") is -2.117 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.825 ns + Longest pin register " "Info: + Longest pin to register delay is 7.825 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.821 ns) 1.821 ns tg 1 PIN PIN_W9 1 " "Info: 1: + IC(0.000 ns) + CELL(1.821 ns) = 1.821 ns; Loc. = PIN_W9; Fanout = 1; PIN Node = 'tg'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { tg } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.810 ns) + CELL(0.194 ns) 7.825 ns qudou:u16\|d:m0\|q 2 REG LC9_11_S2 2 " "Info: 2: + IC(5.810 ns) + CELL(0.194 ns) = 7.825 ns; Loc. = LC9_11_S2; Fanout = 2; REG Node = 'qudou:u16\|d:m0\|q'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "6.004 ns" { tg qudou:u16|d:m0|q } "NODE_NAME" } "" } } { "d.v" "" { Text "D:/colorlight/light_success/simple8/d.v" 3 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.015 ns 25.75 % " "Info: Total cell delay = 2.015 ns ( 25.75 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.810 ns 74.25 % " "Info: Total interconnect delay = 5.810 ns ( 74.25 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "7.825 ns" { tg qudou:u16|d:m0|q } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.825 ns" { tg tg~out0 qudou:u16|d:m0|q } { 0.000ns 0.000ns 5.810ns } { 0.000ns 1.821ns 0.194ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.164 ns + " "Info: + Micro setup delay of destination is 0.164 ns" {  } { { "d.v" "" { Text "D:/colorlight/light_success/simple8/d.v" 3 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "zc destination 10.106 ns - Shortest register " "Info: - Shortest clock path from clock \"zc\" to destination register is 10.106 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.373 ns) 1.373 ns zc 1 CLK PIN_L6 1 " "Info: 1: + IC(0.000 ns) + CELL(1.373 ns) = 1.373 ns; Loc. = PIN_L6; Fanout = 1; CLK Node = 'zc'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { zc } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.628 ns) + CELL(0.464 ns) 2.465 ns clk_select:u22\|clk~8 2 COMB LC4_7_P2 6 " "Info: 2: + IC(0.628 ns) + CELL(0.464 ns) = 2.465 ns; Loc. = LC4_7_P2; Fanout = 6; COMB Node = 'clk_select:u22\|clk~8'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "1.092 ns" { zc clk_select:u22|clk~8 } "NODE_NAME" } "" } } { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.284 ns) + CELL(0.643 ns) 3.392 ns sysclk_250k:u23\|clk_250k 3 REG LC6_7_P2 19 " "Info: 3: + IC(0.284 ns) + CELL(0.643 ns) = 3.392 ns; Loc. = LC6_7_P2; Fanout = 19; REG Node = 'sysclk_250k:u23\|clk_250k'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.927 ns" { clk_select:u22|clk~8 sysclk_250k:u23|clk_250k } "NODE_NAME" } "" } } { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.468 ns) + CELL(0.643 ns) 7.503 ns sysclk:u0\|clk_4 4 REG LC10_16_N1 104 " "Info: 4: + IC(3.468 ns) + CELL(0.643 ns) = 7.503 ns; Loc. = LC10_16_N1; Fanout = 104; REG Node = 'sysclk:u0\|clk_4'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "4.111 ns" { sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.603 ns) + CELL(0.000 ns) 10.106 ns qudou:u16\|d:m0\|q 5 REG LC9_11_S2 2 " "Info: 5: + IC(2.603 ns) + CELL(0.000 ns) = 10.106 ns; Loc. = LC9_11_S2; Fanout = 2; REG Node = 'qudou:u16\|d:m0\|q'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "2.603 ns" { sysclk:u0|clk_4 qudou:u16|d:m0|q } "NODE_NAME" } "" } } { "d.v" "" { Text "D:/colorlight/light_success/simple8/d.v" 3 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.123 ns 30.90 % " "Info: Total cell delay = 3.123 ns ( 30.90 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.983 ns 69.10 % " "Info: Total interconnect delay = 6.983 ns ( 69.10 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "10.106 ns" { zc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 qudou:u16|d:m0|q } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.106 ns" { zc zc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 qudou:u16|d:m0|q } { 0.000ns 0.000ns 0.628ns 0.284ns 3.468ns 2.603ns } { 0.000ns 1.373ns 0.464ns 0.643ns 0.643ns 0.000ns } } }  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "7.825 ns" { tg qudou:u16|d:m0|q } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.825 ns" { tg tg~out0 qudou:u16|d:m0|q } { 0.000ns 0.000ns 5.810ns } { 0.000ns 1.821ns 0.194ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "10.106 ns" { zc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 qudou:u16|d:m0|q } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.106 ns" { zc zc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 qudou:u16|d:m0|q } { 0.000ns 0.000ns 0.628ns 0.284ns 3.468ns 2.603ns } { 0.000ns 1.373ns 0.464ns 0.643ns 0.643ns 0.000ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "test l4 dark_clk:u7\|clk_dark 28.120 ns register " "Info: tco from clock \"test\" to destination pin \"l4\" through register \"dark_clk:u7\|clk_dark\" is 28.120 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "test source 16.148 ns + Longest register " "Info: + Longest clock path from clock \"test\" to source register is 16.148 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.821 ns) 1.821 ns test 1 CLK PIN_T9 1 " "Info: 1: + IC(0.000 ns) + CELL(1.821 ns) = 1.821 ns; Loc. = PIN_T9; Fanout = 1; CLK Node = 'test'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { test } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.975 ns) + CELL(1.139 ns) 8.935 ns clk_select:u22\|clk~8 2 COMB LC4_7_P2 6 " "Info: 2: + IC(5.975 ns) + CELL(1.139 ns) = 8.935 ns; Loc. = LC4_7_P2; Fanout = 6; COMB Node = 'clk_select:u22\|clk~8'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "7.114 ns" { test clk_select:u22|clk~8 } "NODE_NAME" } "" } } { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.284 ns) + CELL(0.643 ns) 9.862 ns sysclk_250k:u23\|clk_250k 3 REG LC6_7_P2 19 " "Info: 3: + IC(0.284 ns) + CELL(0.643 ns) = 9.862 ns; Loc. = LC6_7_P2; Fanout = 19; REG Node = 'sysclk_250k:u23\|clk_250k'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.927 ns" { clk_select:u22|clk~8 sysclk_250k:u23|clk_250k } "NODE_NAME" } "" } } { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.393 ns) + CELL(0.643 ns) 13.898 ns sysclk:u0\|flag2\[0\] 4 REG LC3_16_O1 50 " "Info: 4: + IC(3.393 ns) + CELL(0.643 ns) = 13.898 ns; Loc. = LC3_16_O1; Fanout = 50; REG Node = 'sysclk:u0\|flag2\[0\]'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "4.036 ns" { sysclk_250k:u23|clk_250k sysclk:u0|flag2[0] } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.250 ns) + CELL(0.000 ns) 16.148 ns dark_clk:u7\|clk_dark 5 REG LC9_14_N1 4 " "Info: 5: + IC(2.250 ns) + CELL(0.000 ns) = 16.148 ns; Loc. = LC9_14_N1; Fanout = 4; REG Node = 'dark_clk:u7\|clk_dark'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "2.250 ns" { sysclk:u0|flag2[0] dark_clk:u7|clk_dark } "NODE_NAME" } "" } } { "dark_clk.v" "" { Text "D:/colorlight/light_success/simple8/dark_clk.v" 2 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.246 ns 26.29 % " "Info: Total cell delay = 4.246 ns ( 26.29 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.902 ns 73.71 % " "Info: Total interconnect delay = 11.902 ns ( 73.71 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "16.148 ns" { test clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag2[0] dark_clk:u7|clk_dark } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "16.148 ns" { test test~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag2[0] dark_clk:u7|clk_dark } { 0.000ns 0.000ns 5.975ns 0.284ns 3.393ns 2.250ns } { 0.000ns 1.821ns 1.139ns 0.643ns 0.643ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.434 ns + " "Info: + Micro clock to output delay of source is 0.434 ns" {  } { { "dark_clk.v" "" { Text "D:/colorlight/light_success/simple8/dark_clk.v