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📁 一个圣诞彩灯控制芯片的vrilog源代码
💻 QMSG
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{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "6 " "Warning: Found 6 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "sysclk:u0\|clk_8 " "Info: Detected ripple clock \"sysclk:u0\|clk_8\" as buffer" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sysclk:u0\|clk_8" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "sysclk:u0\|clk_4 " "Info: Detected ripple clock \"sysclk:u0\|clk_4\" as buffer" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sysclk:u0\|clk_4" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "qudou:u16\|rs:m4\|q " "Info: Detected ripple clock \"qudou:u16\|rs:m4\|q\" as buffer" {  } { { "rs.v" "" { Text "D:/colorlight/light_success/simple8/rs.v" 3 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "qudou:u16\|rs:m4\|q" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "clk_select:u22\|clk~8 " "Info: Detected gated clock \"clk_select:u22\|clk~8\" as buffer" {  } { { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk_select:u22\|clk~8" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "sysclk_250k:u23\|clk_250k " "Info: Detected ripple clock \"sysclk_250k:u23\|clk_250k\" as buffer" {  } { { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sysclk_250k:u23\|clk_250k" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "sysclk:u0\|flag2\[0\] " "Info: Detected ripple clock \"sysclk:u0\|flag2\[0\]\" as buffer" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sysclk:u0\|flag2\[0\]" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "test register sysclk:u0\|flag1\[1\] register sysclk:u0\|clk_4 97.1 MHz 10.299 ns Internal " "Info: Clock \"test\" has Internal fmax of 97.1 MHz between source register \"sysclk:u0\|flag1\[1\]\" and destination register \"sysclk:u0\|clk_4\" (period= 10.299 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.245 ns + Longest register register " "Info: + Longest register to register delay is 9.245 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.209 ns) 0.209 ns sysclk:u0\|flag1\[1\] 1 REG LC5_15_X2 3 " "Info: 1: + IC(0.000 ns) + CELL(0.209 ns) = 0.209 ns; Loc. = LC5_15_X2; Fanout = 3; REG Node = 'sysclk:u0\|flag1\[1\]'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.899 ns) 1.408 ns sysclk:u0\|reduce_nor~116 2 COMB LC9_15_X2 1 " "Info: 2: + IC(0.300 ns) + CELL(0.899 ns) = 1.408 ns; Loc. = LC9_15_X2; Fanout = 1; COMB Node = 'sysclk:u0\|reduce_nor~116'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "1.199 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.689 ns) 2.097 ns sysclk:u0\|reduce_nor~112 3 COMB LC10_15_X2 16 " "Info: 3: + IC(0.000 ns) + CELL(0.689 ns) = 2.097 ns; Loc. = LC10_15_X2; Fanout = 16; COMB Node = 'sysclk:u0\|reduce_nor~112'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.689 ns" { sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.644 ns) + CELL(0.464 ns) 5.205 ns sysclk:u0\|clk_4~1 4 COMB LC9_15_O2 1 " "Info: 4: + IC(2.644 ns) + CELL(0.464 ns) = 5.205 ns; Loc. = LC9_15_O2; Fanout = 1; COMB Node = 'sysclk:u0\|clk_4~1'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.108 ns" { sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.381 ns) + CELL(0.659 ns) 9.245 ns sysclk:u0\|clk_4 5 REG LC10_16_N1 104 " "Info: 5: + IC(3.381 ns) + CELL(0.659 ns) = 9.245 ns; Loc. = LC10_16_N1; Fanout = 104; REG Node = 'sysclk:u0\|clk_4'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "4.040 ns" { sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.920 ns 31.58 % " "Info: Total cell delay = 2.920 ns ( 31.58 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.325 ns 68.42 % " "Info: Total interconnect delay = 6.325 ns ( 68.42 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } { 0.000ns 0.300ns 0.000ns 2.644ns 3.381ns } { 0.209ns 0.899ns 0.689ns 0.464ns 0.659ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.456 ns - Smallest " "Info: - Smallest clock skew is -0.456 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "test destination 13.330 ns + Shortest register " "Info: + Shortest clock path from clock \"test\" to destination register is 13.330 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.821 ns) 1.821 ns test 1 CLK PIN_T9 1 " "Info: 1: + IC(0.000 ns) + CELL(1.821 ns) = 1.821 ns; Loc. = PIN_T9; Fanout = 1; CLK Node = 'test'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { test } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.975 ns) + CELL(1.139 ns) 8.935 ns clk_select:u22\|clk~8 2 COMB LC4_7_P2 6 " "Info: 2: + IC(5.975 ns) + CELL(1.139 ns) = 8.935 ns; Loc. = LC4_7_P2; Fanout = 6; COMB Node = 'clk_select:u22\|clk~8'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "7.114 ns" { test clk_select:u22|clk~8 } "NODE_NAME" } "" } } { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.284 ns) + CELL(0.643 ns) 9.862 ns sysclk_250k:u23\|clk_250k 3 REG LC6_7_P2 19 " "Info: 3: + IC(0.284 ns) + CELL(0.643 ns) = 9.862 ns; Loc. = LC6_7_P2; Fanout = 19; REG Node = 'sysclk_250k:u23\|clk_250k'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.927 ns" { clk_select:u22|clk~8 sysclk_250k:u23|clk_250k } "NODE_NAME" } "" } } { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.468 ns) + CELL(0.000 ns) 13.330 ns sysclk:u0\|clk_4 4 REG LC10_16_N1 104 " "Info: 4: + IC(3.468 ns) + CELL(0.000 ns) = 13.330 ns; Loc. = LC10_16_N1; Fanout = 104; REG Node = 'sysclk:u0\|clk_4'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.468 ns" { sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.603 ns 27.03 % " "Info: Total cell delay = 3.603 ns ( 27.03 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.727 ns 72.97 % " "Info: Total interconnect delay = 9.727 ns ( 72.97 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "13.330 ns" { test clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "13.330 ns" { test test~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 5.975ns 0.284ns 3.468ns } { 0.000ns 1.821ns 1.139ns 0.643ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "test source 13.786 ns - Longest register " "Info: - Longest clock path from clock \"test\" to source register is 13.786 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.821 ns) 1.821 ns test 1 CLK PIN_T9 1 " "Info: 1: + IC(0.000 ns) + CELL(1.821 ns) = 1.821 ns; Loc. = PIN_T9; Fanout = 1; CLK Node = 'test'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { test } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.975 ns) + CELL(1.139 ns) 8.935 ns clk_select:u22\|clk~8 2 COMB LC4_7_P2 6 " "Info: 2: + IC(5.975 ns) + CELL(1.139 ns) = 8.935 ns; Loc. = LC4_7_P2; Fanout = 6; COMB Node = 'clk_select:u22\|clk~8'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "7.114 ns" { test clk_select:u22|clk~8 } "NODE_NAME" } "" } } { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.284 ns) + CELL(0.643 ns) 9.862 ns sysclk_250k:u23\|clk_250k 3 REG LC6_7_P2 19 " "Info: 3: + IC(0.284 ns) + CELL(0.643 ns) = 9.862 ns; Loc. = LC6_7_P2; Fanout = 19; REG Node = 'sysclk_250k:u23\|clk_250k'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.927 ns" { clk_select:u22|clk~8 sysclk_250k:u23|clk_250k } "NODE_NAME" } "" } } { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.924 ns) + CELL(0.000 ns) 13.786 ns sysclk:u0\|flag1\[1\] 4 REG LC5_15_X2 3 " "Info: 4: + IC(3.924 ns) + CELL(0.000 ns) = 13.786 ns; Loc. = LC5_15_X2; Fanout = 3; REG Node = 'sysclk:u0\|flag1\[1\]'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.924 ns" { sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.603 ns 26.14 % " "Info: Total cell delay = 3.603 ns ( 26.14 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.183 ns 73.86 % " "Info: Total interconnect delay = 10.183 ns ( 73.86 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "13.786 ns" { test clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "13.786 ns" { test test~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 5.975ns 0.284ns 3.924ns } { 0.000ns 1.821ns 1.139ns 0.643ns 0.000ns } } }  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "13.330 ns" { test clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "13.330 ns" { test test~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 5.975ns 0.284ns 3.468ns } { 0.000ns 1.821ns 1.139ns 0.643ns 0.000ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "13.786 ns" { test clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "13.786 ns" { test test~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 5.975ns 0.284ns 3.924ns } { 0.000ns 1.821ns 1.139ns 0.643ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.434 ns + " "Info: + Micro clock to output delay of source is 0.434 ns" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.164 ns + " "Info: + Micro setup delay of destination is 0.164 ns" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } { 0.000ns 0.300ns 0.000ns 2.644ns 3.381ns } { 0.209ns 0.899ns 0.689ns 0.464ns 0.659ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "13.330 ns" { test clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "13.330 ns" { test test~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 5.975ns 0.284ns 3.468ns } { 0.000ns 1.821ns 1.139ns 0.643ns 0.000ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "13.786 ns" { test clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "13.786 ns" { test test~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 5.975ns 0.284ns 3.924ns } { 0.000ns 1.821ns 1.139ns 0.643ns 0.000ns } } }  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "osc register sysclk:u0\|flag1\[1\] register sysclk:u0\|clk_4 97.1 MHz 10.299 ns Internal " "Info: Clock \"osc\" has Internal fmax of 97.1 MHz between source register \"sysclk:u0\|flag1\[1\]\" and destination register \"sysclk:u0\|clk_4\" (period= 10.299 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.245 ns + Longest register register " "Info: + Longest register to register delay is 9.245 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.209 ns) 0.209 ns sysclk:u0\|flag1\[1\] 1 REG LC5_15_X2 3 " "Info: 1: + IC(0.000 ns) + CELL(0.209 ns) = 0.209 ns; Loc. = LC5_15_X2; Fanout = 3; REG Node = 'sysclk:u0\|flag1\[1\]'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.899 ns) 1.408 ns sysclk:u0\|reduce_nor~116 2 COMB LC9_15_X2 1 " "Info: 2: + IC(0.300 ns) + CELL(0.899 ns) = 1.408 ns; Loc. = LC9_15_X2; Fanout = 1; COMB Node = 'sysclk:u0\|reduce_nor~116'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "1.199 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.689 ns) 2.097 ns sysclk:u0\|reduce_nor~112 3 COMB LC10_15_X2 16 " "Info: 3: + IC(0.000 ns) + CELL(0.689 ns) = 2.097 ns; Loc. = LC10_15_X2; Fanout = 16; COMB Node = 'sysclk:u0\|reduce_nor~112'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.689 ns" { sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.644 ns) + CELL(0.464 ns) 5.205 ns sysclk:u0\|clk_4~1 4 COMB LC9_15_O2 1 " "Info: 4: + IC(2.644 ns) + CELL(0.464 ns) = 5.205 ns; Loc. = LC9_15_O2; Fanout = 1; COMB Node = 'sysclk:u0\|clk_4~1'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.108 ns" { sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.381 ns) + CELL(0.659 ns) 9.245 ns sysclk:u0\|clk_4 5 REG LC10_16_N1 104 " "Info: 5: + IC(3.381 ns) + CELL(0.659 ns) = 9.245 ns; Loc. = LC10_16_N1; Fanout = 104; REG Node = 'sysclk:u0\|clk_4'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "4.040 ns" { sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.920 ns 31.58 % " "Info: Total cell delay = 2.920 ns ( 31.58 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.325 ns 68.42 % " "Info: Total interconnect delay = 6.325 ns ( 68.42 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } { 0.000ns 0.300ns 0.000ns 2.644ns 3.381ns } { 0.209ns 0.899ns 0.689ns 0.464ns 0.659ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.456 ns - Smallest " "Info: - Smallest clock skew is -0.456 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "osc destination 10.358 ns + Shortest register " "Info: + Shortest clock path from clock \"osc\" to destination register is 10.358 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.746 ns) 1.746 ns osc 1 CLK PIN_M16 1 " "Info: 1: + IC(0.000 ns) + CELL(1.746 ns) = 1.746 ns; Loc. = PIN_M16; Fanout = 1; CLK Node = 'osc'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { osc } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.183 ns) + CELL(1.034 ns) 5.963 ns clk_select:u22\|clk~8 2 COMB LC4_7_P2 6 " "Info: 2: + IC(3.183 ns) + CELL(1.034 ns) = 5.963 ns; Loc. = LC4_7_P2; Fanout = 6; COMB Node = 'clk_select:u22\|clk~8'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "4.217 ns" { osc clk_select:u22|clk~8 } "NODE_NAME" } "" } } { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.284 ns) + CELL(0.643 ns) 6.890 ns sysclk_250k:u23\|clk_250k 3 REG LC6_7_P2 19 " "Info: 3: + IC(0.284 ns) + CELL(0.643 ns) = 6.890 ns; Loc. = LC6_7_P2; Fanout = 19; REG Node = 'sysclk_250k:u23\|clk_250k'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.927 ns" { clk_select:u22|clk~8 sysclk_250k:u23|clk_250k } "NODE_NAME" } "" } } { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.468 ns) + CELL(0.000 ns) 10.358 ns sysclk:u0\|clk_4 4 REG LC10_16_N1 104 " "Info: 4: + IC(3.468 ns) + CELL(0.000 ns) = 10.358 ns; Loc. = LC10_16_N1; Fanout = 104; REG Node = 'sysclk:u0\|clk_4'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.468 ns" { sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.423 ns 33.05 % " "Info: Total cell delay = 3.423 ns ( 33.05 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.935 ns 66.95 % " "Info: Total interconnect delay = 6.935 ns ( 66.95 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "10.358 ns" { osc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.358 ns" { osc osc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 3.183ns 0.284ns 3.468ns } { 0.000ns 1.746ns 1.034ns 0.643ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "osc source 10.814 ns - Longest register " "Info: - Longest clock path from clock \"osc\" to source register is 10.814 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.746 ns) 1.746 ns osc 1 CLK PIN_M16 1 " "Info: 1: + IC(0.000 ns) + CELL(1.746 ns) = 1.746 ns; Loc. = PIN_M16; Fanout = 1; CLK Node = 'osc'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "" { osc } "NODE_NAME" } "" } } { "top.v" "" { Text "D:/colorlight/light_success/simple8/top.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.183 ns) + CELL(1.034 ns) 5.963 ns clk_select:u22\|clk~8 2 COMB LC4_7_P2 6 " "Info: 2: + IC(3.183 ns) + CELL(1.034 ns) = 5.963 ns; Loc. = LC4_7_P2; Fanout = 6; COMB Node = 'clk_select:u22\|clk~8'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "4.217 ns" { osc clk_select:u22|clk~8 } "NODE_NAME" } "" } } { "clk_select.v" "" { Text "D:/colorlight/light_success/simple8/clk_select.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.284 ns) + CELL(0.643 ns) 6.890 ns sysclk_250k:u23\|clk_250k 3 REG LC6_7_P2 19 " "Info: 3: + IC(0.284 ns) + CELL(0.643 ns) = 6.890 ns; Loc. = LC6_7_P2; Fanout = 19; REG Node = 'sysclk_250k:u23\|clk_250k'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "0.927 ns" { clk_select:u22|clk~8 sysclk_250k:u23|clk_250k } "NODE_NAME" } "" } } { "sysclk_250k.v" "" { Text "D:/colorlight/light_success/simple8/sysclk_250k.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.924 ns) + CELL(0.000 ns) 10.814 ns sysclk:u0\|flag1\[1\] 4 REG LC5_15_X2 3 " "Info: 4: + IC(3.924 ns) + CELL(0.000 ns) = 10.814 ns; Loc. = LC5_15_X2; Fanout = 3; REG Node = 'sysclk:u0\|flag1\[1\]'" {  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "3.924 ns" { sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.423 ns 31.65 % " "Info: Total cell delay = 3.423 ns ( 31.65 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.391 ns 68.35 % " "Info: Total interconnect delay = 7.391 ns ( 68.35 % )" {  } {  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "10.814 ns" { osc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.814 ns" { osc osc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 3.183ns 0.284ns 3.924ns } { 0.000ns 1.746ns 1.034ns 0.643ns 0.000ns } } }  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "10.358 ns" { osc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.358 ns" { osc osc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 3.183ns 0.284ns 3.468ns } { 0.000ns 1.746ns 1.034ns 0.643ns 0.000ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "10.814 ns" { osc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.814 ns" { osc osc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 3.183ns 0.284ns 3.924ns } { 0.000ns 1.746ns 1.034ns 0.643ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.434 ns + " "Info: + Micro clock to output delay of source is 0.434 ns" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 8 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.164 ns + " "Info: + Micro setup delay of destination is 0.164 ns" {  } { { "sysclk.v" "" { Text "D:/colorlight/light_success/simple8/sysclk.v" 5 -1 0 } }  } 0}  } { { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.245 ns" { sysclk:u0|flag1[1] sysclk:u0|reduce_nor~116 sysclk:u0|reduce_nor~112 sysclk:u0|clk_4~1 sysclk:u0|clk_4 } { 0.000ns 0.300ns 0.000ns 2.644ns 3.381ns } { 0.209ns 0.899ns 0.689ns 0.464ns 0.659ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "10.358 ns" { osc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.358 ns" { osc osc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|clk_4 } { 0.000ns 0.000ns 3.183ns 0.284ns 3.468ns } { 0.000ns 1.746ns 1.034ns 0.643ns 0.000ns } } } { "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" "" { Report "D:/colorlight/light_success/simple8/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/colorlight/light_success/simple8/db/colorlight.quartus_db" { Floorplan "D:/colorlight/light_success/simple8/" "" "10.814 ns" { osc clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.814 ns" { osc osc~out0 clk_select:u22|clk~8 sysclk_250k:u23|clk_250k sysclk:u0|flag1[1] } { 0.000ns 0.000ns 3.183ns 0.284ns 3.924ns } { 0.000ns 1.746ns 1.034ns 0.643ns 0.000ns } } }  } 0}
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