model4_top.v

来自「一个圣诞彩灯控制芯片的vrilog源代码」· Verilog 代码 · 共 32 行

//`include "bright_clk.v"
//`include "bright_clk.v"
//`include "dark_clk.v"
//`include "model4_slow.v"
//`include "model4_fast.v"
//`include "model4_select.v"

module model4_top(l1,l2,l3,l4,c,en,reset,clk_4);
input  en,reset,clk_4;
output [1:0] l1,l2,l3,l4;
output c;
wire [1:0] l1,l2,l3,l4;
wire c;
wire [1:0] I0,I1,I2,I3,I4,I5,I6,I7;
wire [1:0] cin;
wire [1:0] ein;

//module model4_slow(l1,l2,l3,l4,c,clk,reset,en);
model4_slow u2(I0,I1,I2,I3,cin[0],clk_4,reset,ein[0]);

//module model4_fast(l1,l2,l3,l4,c,clk,reset,en);
model4_fast u3(I4,I5,I6,I7,cin[1],clk_4,reset,ein[1]);

//module model4_select(l1,l2,l3,l4,c,en1,en2, 
//                     reset,en,clk,c1,c2,l11,l12,l13,l14,l21,l22,l23,l24);
model4_select  u4(l1,l2,l3,l4,c,ein[0],ein[1],reset,en,clk_4,
                  cin[0],cin[1],I0,I1,I2,I3,I4,I5,I6,I7);

endmodule