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一个圣诞彩灯控制芯片的vrilog源代码

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : -2.117 ns
From           : tg
To             : qudou:u16|d:m0|q
From Clock     : 
To Clock       : zc
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 28.120 ns
From           : dark_clk:u7|clk_dark
To             : l4
From Clock     : test
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 9.100 ns
From           : tg
To             : qudou:u16|d:m0|q
From Clock     : 
To Clock       : test
Failed Paths   : 0

Type           : Clock Setup: 'zc'
Slack          : N/A
Required Time  : None
Actual Time    : 97.10 MHz ( period = 10.299 ns )
From           : sysclk:u0|flag1[1]
To             : sysclk:u0|clk_4
From Clock     : zc
To Clock       : zc
Failed Paths   : 0

Type           : Clock Setup: 'osc'
Slack          : N/A
Required Time  : None
Actual Time    : 97.10 MHz ( period = 10.299 ns )
From           : sysclk:u0|flag1[1]
To             : sysclk:u0|clk_4
From Clock     : osc
To Clock       : osc
Failed Paths   : 0

Type           : Clock Setup: 'test'
Slack          : N/A
Required Time  : None
Actual Time    : 97.10 MHz ( period = 10.299 ns )
From           : sysclk:u0|flag1[1]
To             : sysclk:u0|clk_4
From Clock     : test
To Clock       : test
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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