model2_top.v

来自「一个圣诞彩灯控制芯片的vrilog源代码」· Verilog 代码 · 共 28 行

//`include "bright_clk.v"
//`include "model2_fast.v"
//`include "model2_slow.v"
//`include "model2_select.v" 
module model2_top(l1,l2,l3,l4,c,en,reset,clk_4);
input  en,reset,clk_4;
output [1:0] l1,l2,l3,l4;
output c;
wire   [1:0] l1,l2,l3,l4;
wire   c;
wire     [1:0] I0,I1,I2,I3,I4,I5,I6,I7;
wire    [1:0] cin;
wire     [1:0] ein;

//module model2_slow(l1,l2,l3,l4,c,clk,en,reset);
model2_slow u0(I0,I1,I2,I3,cin[0],clk_4,ein[0],reset);

//module model2_fast(l1,l2,l3,l4,c,clk,en,reset);
model2_fast u1(I4,I5,I6,I7,cin[1],clk_4,ein[1],reset);

//module model2_select(l1,l2,l3,l4,c,en1,en2,
//                     reset,en,clk,c1,c2,l11,l12,l13,l14,l21,l22,l23,l24);
model2_select  u2(l1,l2,l3,l4,c,ein[0],ein[1],reset,en,clk_4,cin[0],cin[1],I0,I1,I2,I3,I4,I5,I6,I7);

endmodule