halfadder.vhd

来自「全加器,有半加器和或门组成.元件例化语句.」· VHDL 代码 · 共 13 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
  ENTITY halfadd IS
  PORT(a,b:IN STD_LOGIC;
       so,co:OUT STD_LOGIC
       );
  END halfadd;
ARCHITECTURE wo OF halfadd IS
BEGIN
  so<=a XOR b;
  co<=a and b;
END wo;