config.pl

ARM7系统IP核的VHDL语言源代码

#!/usr/bin/perl

%cache_cfg = (
    
    # icache 
    CFG_ICACHE_SZ => 2,
    CFG_ICACHE_LSZ => 16,
    CFG_ICACHE_ASSO => 1,
    CFG_ICACHE_ALGO => "rnd",
    CFG_ICACHE_LOCK => 0,
    CFG_ICACHE_REPL => cfg_repl_rnd,

    # dcache 
    CFG_DCACHE_TYPE => writethrough,
    CFG_DCACHE_ALLOCATE => 0,
    CFG_DCACHE_SZ => 1,
    CFG_DCACHE_LSZ => 16,
    CFG_DCACHE_ASSO => 1,
    CFG_DCACHE_ALGO => "rnd",
    CFG_DCACHE_WB => 2,
    CFG_DCACHE_LOCK => 0,
    CFG_DCACHE_REPL => cfg_repl_rnd

);

%cache_map = 
   (

    # icache config 
    CFG_ICACHE_ASSO => [
	CONFIG_ICACHE_ASSO1 => 1,
	CONFIG_ICACHE_ASSO2 => 2,
	CONFIG_ICACHE_ASSO3 => 3,
	CONFIG_ICACHE_ASSO4 => 4 
	],
    CFG_ICACHE_ALGO => [
	CONFIG_ICACHE_ALGORND => "rnd"
	],
	
    CFG_ICACHE_SZ => [ 
	CONFIG_ICACHE_SZ1 => 1,
	CONFIG_ICACHE_SZ2 => 2,
	CONFIG_ICACHE_SZ4 => 4,
	CONFIG_ICACHE_SZ8 => 8,
	CONFIG_ICACHE_SZ16 => 16,
	CONFIG_ICACHE_SZ32 => 32,
	CONFIG_ICACHE_SZ64 => 64 
	],

    CFG_ICACHE_LSZ => [ 
	CONFIG_ICACHE_LZ4 => 4,
	CONFIG_ICACHE_LZ8 => 8
	],

    CFG_ICACHE_LOCK => [
	CONFIG_GENICACHE_LOCK => 1
	],
    
    CFG_ICACHE_REPL =>  [ 
	CONFIG_ICACHE_ALGORND => "cfg_repl_rnd",
	CONFIG_ICACHE_ALGOLRR => "cfg_repl_lrr",
	CONFIG_ICACHE_ALGOLRU => "cfg_repl_lru"
	],
        
    # dcache config 
    CFG_DCACHE_TYPE => [
	CONFIG_DCACHE_WRITEBACK => writeback,
	CONFIG_DCACHE_WRITETHROUGH => writethrough
	],

    CFG_DCACHE_ALLOCATE => [
	CONFIG_DCACHE_ALLOCATEONSTORE => 1,
	],

    CFG_DCACHE_SZ => [ 
	CONFIG_DCACHE_SZ1 => 1,
	CONFIG_DCACHE_SZ2 => 2,
	CONFIG_DCACHE_SZ4 => 4,
	CONFIG_DCACHE_SZ8 => 8,
	CONFIG_DCACHE_SZ16 => 16,
	CONFIG_DCACHE_SZ32 => 32,
	CONFIG_DCACHE_SZ64 => 64
	],

    CFG_DCACHE_LSZ => [
	CONFIG_DCACHE_LZ4 => 4,
	CONFIG_DCACHE_LZ8 => 8
	],
    
    CFG_DCACHE_ASSO => [ 
	CONFIG_DCACHE_ASSO1 => 1,
	CONFIG_DCACHE_ASSO2 => 2,
	CONFIG_DCACHE_ASSO3 => 3,
	CONFIG_DCACHE_ASSO4 => 4 
	],
		     
    CFG_DCACHE_ALGO => [ 
	CONFIG_DCACHE_ALGORND => "rnd"
	],

    CFG_DCACHE_WB => [ 
	CONFIG_DCACHE_WB_SZ1 => "1",
	CONFIG_DCACHE_WB_SZ2 => "2",
	CONFIG_DCACHE_WB_SZ4 => "4",
	CONFIG_DCACHE_WB_SZ8 => "8",
	CONFIG_DCACHE_WB_SZ16 => "16"
	],

    CFG_DCACHE_LOCK => [
	CONFIG_GENDCACHE_LOCK => 1
	],

    CFG_DCACHE_REPL =>  [ 
	CONFIG_DCACHE_ALGORND => "cfg_repl_rnd",
	CONFIG_DCACHE_ALGOLRR => "cfg_repl_lrr",
	CONFIG_DCACHE_ALGOLRU => "cfg_repl_lru"
	]

    
);		     

sub cache_config_file {
    
    my ($pericfg) = @_;
    my %pericfg = %{$pericfg};
    my $fn = "vhdl/mem/cache/cache_config.vhd";
    
    if (-f $fn) {
	print STDERR ("Making backup of $fn\n");
	`cp $fn $fn.bck`;
    }
    
    foreach $k (keys %pericfg) {
	$v = $pericfg{$k};
	print ("$k:$v\n");
	$cache_config_file_data = cfg_replace ($k,$v,$cache_config_file_data);
    }

    if (open(FILEH, ">$fn")) {
	print FILEH $cache_config_file_data;
    } else {
	die ("opening \"$fn\": $!\n");
    }
}

$cache_config_file_data=<<CACHE_CONFIG_END;

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;

package cache_config is

-----------------------------------------------------------------------------
-- Automatically generated by vhdl/mem/cache/config.pl from of .config
-----------------------------------------------------------------------------

type cfg_repl_type is (cfg_repl_rnd, cfg_repl_lrr, cfg_repl_lru );

-- icache
constant CFG_IC_SETS     : integer range 1 to 4  := %CFG_ICACHE_ASSO%;  -- 1-4 sets
constant CFG_IC_SET_SZ   : integer range 1 to 64 := %CFG_ICACHE_SZ%;  -- 1-64 kb
constant CFG_IC_TLINE_SZ  : integer range 2 to 8  := %CFG_ICACHE_LSZ%; -- 2-8 words
constant CFG_IC_DLINE_SZ  : integer range 1 to 4  := 1; -- 1-4 words
constant CFG_IC_ADDR_SZ  : integer := 32;
constant CFG_IC_LOCK  : boolean := %CFG_ICACHE_LOCK%[b];
constant CFG_IC_REPL  : cfg_repl_type := %CFG_ICACHE_REPL%;

-- dcache

constant CFG_DC_SETS     : integer range 1 to 4  := %CFG_DCACHE_ASSO%;   -- 1-4 sets
constant CFG_DC_SET_SZ   : integer range 1 to 64 := %CFG_DCACHE_SZ%;   -- 1-64 kb
constant CFG_DC_TLINE_SZ  : integer range 2 to 8  := %CFG_DCACHE_LSZ%;  -- 2-8 words
constant CFG_DC_DLINE_SZ  : integer range 1 to 8 := 1;  -- 1-4 words
constant CFG_DC_ADDR_SZ  : integer := 32;
constant CFG_DC_LOCK  : boolean := %CFG_DCACHE_LOCK%[b];
constant CFG_DC_REPL  : cfg_repl_type := %CFG_DCACHE_REPL%;


-- writebuffer
constant CFG_WBBUF_SZ  : integer range 1 to 16  := %CFG_DCACHE_WB%; 

-----------------------------------------------------------------------------
-- end of automatic configuration
-----------------------------------------------------------------------------

end cache_config;

CACHE_CONFIG_END

1;