ufm.v

Altera epm240 的ufm调用。

// megafunction wizard: %Flash Memory%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altufm_parallel 

// ============================================================
// File Name: UFM.v
// Megafunction Name(s):
// 			altufm_parallel
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
//
// 5.0 Build 171 11/03/2005 SP 2 SJ Full Version
// ************************************************************


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//without limitation, that your use is for the sole purpose of   
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//altufm_parallel ACCESS_MODE="READ_ONLY" CBX_AUTO_BLACKBOX="ON" DEVICE_FAMILY="MAX II" LPM_FILE="text.mif" OSC_FREQUENCY=180000 WIDTH_ADDRESS=4 WIDTH_DATA=8 WIDTH_UFM_ADDRESS=9 addr data_valid do nbusy nread
//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_altufm 2005:04:05:23:23:52:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_counter 2005:02:02:04:37:10:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_maxii 2004:12:08:04:40:04:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:11:01:14:36:46:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ  VERSION_END


//lpm_counter CBX_AUTO_BLACKBOX="ON" DEVICE_FAMILY="MAX II" lpm_direction="UP" lpm_modulus=28 lpm_width=5 clk_en clock q
//VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_counter 2005:02:02:04:37:10:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:11:01:14:36:46:SJ cbx_stratixii 2004:12:22:13:27:12:SJ  VERSION_END

//synthesis_resources = lut 49 maxii_ufm 1 
//synopsys translate_off
`timescale 1 ps / 1 ps
//synopsys translate_on
module  UFM_altufm_parallel_nqi
	( 
	addr,
	data_valid,
	do,
	nbusy,
	nread) /* synthesis synthesis_clearbox=1 */;
	input   [3:0]  addr;
	output   data_valid;
	output   [7:0]  do;
	output   nbusy;
	input   nread;

	reg	[0:0]	dffe10a0;
	reg	[0:0]	dffe10a1;
	reg	[0:0]	dffe10a2;
	reg	[0:0]	dffe10a3;
	reg	[0:0]	dffe10a4;
	reg	[0:0]	dffe10a5;
	reg	[0:0]	dffe10a6;
	reg	[0:0]	dffe10a7;
	reg	[0:0]	dffe10a8;
	reg	[0:0]	dffe10a9;
	reg	[0:0]	dffe10a10;
	reg	[0:0]	dffe10a11;
	reg	[0:0]	dffe10a12;
	reg	[0:0]	dffe10a13;
	reg	[0:0]	dffe10a14;
	reg	[0:0]	dffe10a15;
	wire	[7:0]	wire_dffe11a_D;
	reg	[7:0]	dffe11a;
	wire	[7:0]	wire_dffe11a_ENA;
	reg	dffe12;
	reg	dffe13;
	reg	dffe2;
	reg	dffe3;
	reg	dffe4;
	reg	dffe5;
	reg	dffe7;
	reg	dffe8;
	wire	[3:0]	wire_dffe9a_D;
	reg	[3:0]	dffe9a;
	reg	[5:0]	wire_cntr6_q_int;
	wire	wire_cntr6_clk_en;
	wire	wire_cntr6_clock;
	wire	[4:0]	wire_cntr6_q;
	wire  wire_maxii_ufm_block1_bgpbusy;
	wire  wire_maxii_ufm_block1_drdout;
	wire  wire_maxii_ufm_block1_osc;
	wire  add_en;
	wire  add_load;
	wire  arclk;
	wire  busy_arclk;
	wire  busy_drclk;
	wire  control_mux;
	wire  copy_tmp_decode;
	wire  data_valid_en;
	wire  dly_tmp_decode;
	wire  drdin;
	wire  gated1;
	wire  gated2;
	wire  hold_decode;
	wire  in_read_data_en;
	wire  in_read_drclk;
	wire  in_read_drshft;
	wire  mux_nread;
	wire  q0;
	wire  q1;
	wire  q2;
	wire  q3;
	wire  q4;
	wire  read;
	wire  read_op;
	wire  real_decode;
	wire  [3:0]  shiftin;
	wire  [15:0]  sipo_q;
	wire  start_decode;
	wire  start_op;
	wire  stop_op;
	wire  tmp_add_en;
	wire  tmp_add_load;
	wire  tmp_arclk;
	wire  tmp_arclk0;
	wire  tmp_ardin;
	wire  tmp_arshft;
	wire  tmp_data_valid2;
	wire  tmp_decode;
	wire  tmp_drclk;
	wire  tmp_in_read_data_en;
	wire  tmp_in_read_drclk;
	wire  tmp_in_read_drshft;
	wire  tmp_read;
	wire  ufm_arclk;
	wire  ufm_ardin;
	wire  ufm_arshft;
	wire  ufm_bgpbusy;
	wire  ufm_drclk;
	wire  ufm_drdin;
	wire  ufm_drdout;
	wire  ufm_drshft;
	wire  ufm_osc;
	wire  ufm_oscena;
	wire  [3:0]  X_var;
	wire  [3:0]  Y_var;
	wire  [3:0]  Z_var;

	// synopsys translate_off
	initial
		dffe10a0 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a0 <= ufm_drdout;
	// synopsys translate_off
	initial
		dffe10a1 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a1 <= sipo_q[0];
	// synopsys translate_off
	initial
		dffe10a2 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a2 <= sipo_q[1];
	// synopsys translate_off
	initial
		dffe10a3 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a3 <= sipo_q[2];
	// synopsys translate_off
	initial
		dffe10a4 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a4 <= sipo_q[3];
	// synopsys translate_off
	initial
		dffe10a5 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a5 <= sipo_q[4];
	// synopsys translate_off
	initial
		dffe10a6 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a6 <= sipo_q[5];
	// synopsys translate_off
	initial
		dffe10a7 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a7 <= sipo_q[6];
	// synopsys translate_off
	initial
		dffe10a8 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a8 <= sipo_q[7];
	// synopsys translate_off
	initial
		dffe10a9 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a9 <= sipo_q[8];
	// synopsys translate_off
	initial
		dffe10a10 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a10 <= sipo_q[9];
	// synopsys translate_off
	initial
		dffe10a11 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a11 <= sipo_q[10];
	// synopsys translate_off
	initial
		dffe10a12 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a12 <= sipo_q[11];
	// synopsys translate_off
	initial
		dffe10a13 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a13 <= sipo_q[12];
	// synopsys translate_off
	initial
		dffe10a14 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a14 <= sipo_q[13];
	// synopsys translate_off
	initial
		dffe10a15 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a15 <= sipo_q[14];
	// synopsys translate_off
	initial
		dffe11a[0:0] = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (wire_dffe11a_ENA[0:0] == 1'b1)   dffe11a[0:0] <= wire_dffe11a_D[0:0];
	// synopsys translate_off
	initial
		dffe11a[1:1] = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (wire_dffe11a_ENA[1:1] == 1'b1)   dffe11a[1:1] <= wire_dffe11a_D[1:1];
	// synopsys translate_off
	initial
		dffe11a[2:2] = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (wire_dffe11a_ENA[2:2] == 1'b1)   dffe11a[2:2] <= wire_dffe11a_D[2:2];
	// synopsys translate_off
	initial
		dffe11a[3:3] = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (wire_dffe11a_ENA[3:3] == 1'b1)   dffe11a[3:3] <= wire_dffe11a_D[3:3];
	// synopsys translate_off
	initial
		dffe11a[4:4] = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (wire_dffe11a_ENA[4:4] == 1'b1)   dffe11a[4:4] <= wire_dffe11a_D[4:4];
	// synopsys translate_off
	initial
		dffe11a[5:5] = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (wire_dffe11a_ENA[5:5] == 1'b1)   dffe11a[5:5] <= wire_dffe11a_D[5:5];
	// synopsys translate_off
	initial
		dffe11a[6:6] = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (wire_dffe11a_ENA[6:6] == 1'b1)   dffe11a[6:6] <= wire_dffe11a_D[6:6];
	// synopsys translate_off