main.qsf

来自「Altera epm240 的ufm调用。」· QSF 代码 · 共 98 行

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		Main_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "5.0 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:38:35  DECEMBER 30, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION "5.0 SP2"
set_global_assignment -name VERILOG_FILE UFM.v
set_global_assignment -name MIF_FILE text.mif
set_global_assignment -name VERILOG_FILE main.v

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_42 -to reset_
set_location_assignment PIN_14 -to ds_
set_location_assignment PIN_17 -to ps_
set_location_assignment PIN_1 -to csRam_
set_location_assignment PIN_98 -to dig
set_location_assignment PIN_84 -to dv
set_location_assignment PIN_88 -to segment[0]
set_location_assignment PIN_89 -to segment[1]
set_location_assignment PIN_90 -to segment[2]
set_location_assignment PIN_91 -to segment[3]
set_location_assignment PIN_92 -to segment[4]
set_location_assignment PIN_95 -to segment[5]
set_location_assignment PIN_96 -to segment[6]
set_location_assignment PIN_97 -to segment[7]
set_location_assignment PIN_85 -to clkOut
set_location_assignment PIN_64 -to clkOSC
set_location_assignment PIN_62 -to clkDSP
set_location_assignment PIN_41 -to sel

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY MAIN

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM240T100C5
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF

# ----------------
# start CLOCK(CLK)

	# Timing Assignments
	# ==================
	set_global_assignment -name FMAX_REQUIREMENT "50.0 MHz" -section_id CLK
	set_global_assignment -name DUTY_CYCLE 50 -section_id CLK
	set_global_assignment -name INVERT_BASE_CLOCK OFF -section_id CLK
	set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id CLK
	set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id CLK

# end CLOCK(CLK)
# --------------

# ------------------
# start ENTITY(MAIN)

	# Timing Assignments
	# ==================
	set_instance_assignment -name CLOCK_SETTINGS CLK -to clkOSC

# end ENTITY(MAIN)
# ----------------