main.map.eqn

Altera epm240 的ufm调用。

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--A1L6 is csRam_~0
--operation mode is normal

A1L6 = ds_ & ps_;


--C1_dffe11a[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe11a[0]
--operation mode is normal

C1_dffe11a[0]_lut_out = C1_dffe10a8[0];
C1_dffe11a[0] = DFFEAS(C1_dffe11a[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_wire_dffe11a_ENA[7], , , , );


--C1_dffe11a[1] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe11a[1]
--operation mode is normal

C1_dffe11a[1]_lut_out = C1_dffe10a9[0];
C1_dffe11a[1] = DFFEAS(C1_dffe11a[1]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_wire_dffe11a_ENA[7], , , , );


--C1_dffe11a[2] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe11a[2]
--operation mode is normal

C1_dffe11a[2]_lut_out = C1_dffe10a10[0];
C1_dffe11a[2] = DFFEAS(C1_dffe11a[2]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_wire_dffe11a_ENA[7], , , , );


--C1_dffe11a[3] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe11a[3]
--operation mode is normal

C1_dffe11a[3]_lut_out = C1_dffe10a11[0];
C1_dffe11a[3] = DFFEAS(C1_dffe11a[3]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_wire_dffe11a_ENA[7], , , , );


--C1_dffe11a[4] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe11a[4]
--operation mode is normal

C1_dffe11a[4]_lut_out = C1_dffe10a12[0];
C1_dffe11a[4] = DFFEAS(C1_dffe11a[4]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_wire_dffe11a_ENA[7], , , , );


--C1_dffe11a[5] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe11a[5]
--operation mode is normal

C1_dffe11a[5]_lut_out = C1_dffe10a13[0];
C1_dffe11a[5] = DFFEAS(C1_dffe11a[5]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_wire_dffe11a_ENA[7], , , , );


--C1_dffe11a[6] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe11a[6]
--operation mode is normal

C1_dffe11a[6]_lut_out = C1_dffe10a14[0];
C1_dffe11a[6] = DFFEAS(C1_dffe11a[6]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_wire_dffe11a_ENA[7], , , , );


--C1_dffe11a[7] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe11a[7]
--operation mode is normal

C1_dffe11a[7]_lut_out = C1_dffe10a15[0];
C1_dffe11a[7] = DFFEAS(C1_dffe11a[7]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_wire_dffe11a_ENA[7], , , , );


--C1_dffe8 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe8
--operation mode is normal

C1_dffe8_lut_out = C1_wire_dffe11a_ENA[7];
C1_dffe8 = DFFEAS(C1_dffe8_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--timer[24] is timer[24]
--operation mode is normal

timer[24]_carry_eqn = A1L07;
timer[24]_lut_out = timer[24] $ (!timer[24]_carry_eqn);
timer[24] = DFFEAS(timer[24]_lut_out, A1L4, reset_, , , , , , );


--C1_dffe13 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe13
--operation mode is normal

C1_dffe13_lut_out = C1L86;
C1_dffe13 = DFFEAS(C1_dffe13_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--C1_ufm_drclk is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|ufm_drclk
--operation mode is normal

C1_ufm_drclk = C1_dffe13 & (!C1_wire_maxii_ufm_block1_osc);


--C1_dffe4 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe4
--operation mode is normal

C1_dffe4_lut_out = C1L37 & (!C1_wire_maxii_ufm_block1_bgpbusy & !C1_dffe5) # !C1L37 & !C1_data_valid_en;
C1_dffe4 = DFFEAS(C1_dffe4_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_start_op, , , , );


--C1_wire_cntr6_q_int[4] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|wire_cntr6_q_int[4]
--operation mode is normal

C1_wire_cntr6_q_int[4]_lut_out = C1L3 $ (C1_wire_cntr6_q_int[4] & C1L67);
C1_wire_cntr6_q_int[4] = DFFEAS(C1_wire_cntr6_q_int[4]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_dffe4, , , , );


--C1_wire_cntr6_q_int[1] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|wire_cntr6_q_int[1]
--operation mode is normal

C1_wire_cntr6_q_int[1]_lut_out = C1L4;
C1_wire_cntr6_q_int[1] = DFFEAS(C1_wire_cntr6_q_int[1]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_dffe4, , , , );


--C1_wire_cntr6_q_int[3] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|wire_cntr6_q_int[3]
--operation mode is normal

C1_wire_cntr6_q_int[3]_lut_out = C1L6 $ (C1_wire_cntr6_q_int[4] & C1L67);
C1_wire_cntr6_q_int[3] = DFFEAS(C1_wire_cntr6_q_int[3]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_dffe4, , , , );


--C1_wire_cntr6_q_int[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|wire_cntr6_q_int[0]
--operation mode is normal

C1_wire_cntr6_q_int[0]_lut_out = C1L8;
C1_wire_cntr6_q_int[0] = DFFEAS(C1_wire_cntr6_q_int[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_dffe4, , , , );


--C1_wire_cntr6_q_int[2] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|wire_cntr6_q_int[2]
--operation mode is normal

C1_wire_cntr6_q_int[2]_lut_out = C1L01 $ (C1_wire_cntr6_q_int[4] & C1L67);
C1_wire_cntr6_q_int[2] = DFFEAS(C1_wire_cntr6_q_int[2]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_dffe4, , , , );


--C1L67 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|tmp_data_valid2~21
--operation mode is normal

C1L67 = C1_wire_cntr6_q_int[1] & C1_wire_cntr6_q_int[3] & C1_wire_cntr6_q_int[0] & !C1_wire_cntr6_q_int[2];


--C1L18 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|ufm_drshft~20
--operation mode is normal

C1L18 = C1_dffe4 & (C1_wire_cntr6_q_int[4] # !C1L67);


--C1_dffe9a[3] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe9a[3]
--operation mode is normal

C1_dffe9a[3]_lut_out = C1_dffe4 & (C1L2 & timer[24] # !C1L2 & (C1_dffe9a[2])) # !C1_dffe4 & (C1_dffe9a[2]);
C1_dffe9a[3] = DFFEAS(C1_dffe9a[3]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_ufm_arshft, , , , );


--C1_dffe12 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe12
--operation mode is normal

C1_dffe12_lut_out = C1L97 & (C1L68 & !C1_wire_cntr6_q_int[0] # !C1_wire_cntr6_q_int[3]);
C1_dffe12 = DFFEAS(C1_dffe12_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--C1_ufm_arclk is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|ufm_arclk
--operation mode is normal

C1_ufm_arclk = C1_dffe12 & (!C1_wire_maxii_ufm_block1_osc);


--C1L97 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|ufm_arshft~26
--operation mode is normal

C1L97 = C1_dffe4 & (!C1_wire_cntr6_q_int[4]);


--C1L1 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add_load~87
--operation mode is normal

C1L1 = C1_wire_cntr6_q_int[3] & (C1_wire_cntr6_q_int[1] # C1_wire_cntr6_q_int[2]);


--C1_dffe10a8[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a8[0]
--operation mode is normal

C1_dffe10a8[0]_lut_out = C1_dffe10a7[0];
C1_dffe10a8[0] = DFFEAS(C1_dffe10a8[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--C1_dffe7 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe7
--operation mode is normal

C1_dffe7_lut_out = C1_dffe4 & C1_wire_cntr6_q_int[4] & C1L67;
C1_dffe7 = DFFEAS(C1_dffe7_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_data_valid_en, , , , );


--C1_wire_dffe11a_ENA[7] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|wire_dffe11a_ENA[7]
--operation mode is normal

C1_wire_dffe11a_ENA[7] = C1_dffe7 & (!C1_dffe4);


--C1_dffe10a9[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a9[0]
--operation mode is normal

C1_dffe10a9[0]_lut_out = C1_dffe10a8[0];
C1_dffe10a9[0] = DFFEAS(C1_dffe10a9[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--C1_dffe10a10[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a10[0]
--operation mode is normal

C1_dffe10a10[0]_lut_out = C1_dffe10a9[0];
C1_dffe10a10[0] = DFFEAS(C1_dffe10a10[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--C1_dffe10a11[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a11[0]
--operation mode is normal

C1_dffe10a11[0]_lut_out = C1_dffe10a10[0];
C1_dffe10a11[0] = DFFEAS(C1_dffe10a11[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--C1_dffe10a12[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a12[0]
--operation mode is normal

C1_dffe10a12[0]_lut_out = C1_dffe10a11[0];
C1_dffe10a12[0] = DFFEAS(C1_dffe10a12[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--C1_dffe10a13[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a13[0]
--operation mode is normal

C1_dffe10a13[0]_lut_out = C1_dffe10a12[0];
C1_dffe10a13[0] = DFFEAS(C1_dffe10a13[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--C1_dffe10a14[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a14[0]
--operation mode is normal

C1_dffe10a14[0]_lut_out = C1_dffe10a13[0];
C1_dffe10a14[0] = DFFEAS(C1_dffe10a14[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--C1_dffe10a15[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a15[0]
--operation mode is normal

C1_dffe10a15[0]_lut_out = C1_dffe10a14[0];
C1_dffe10a15[0] = DFFEAS(C1_dffe10a15[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--A1L4 is clk~7
--operation mode is normal

A1L4 = sel & clkOSC # !sel & (clkDSP);


--timer[23] is timer[23]
--operation mode is arithmetic

timer[23]_carry_eqn = A1L86;
timer[23]_lut_out = timer[23] $ (timer[23]_carry_eqn);
timer[23] = DFFEAS(timer[23]_lut_out, A1L4, reset_, , , , , , );

--A1L07 is timer[23]~180
--operation mode is arithmetic

A1L07 = CARRY(!A1L86 # !timer[23]);


--C1L76 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|in_read_drclk~137
--operation mode is normal

C1L76 = C1_wire_cntr6_q_int[1] & (!C1_wire_cntr6_q_int[0]);


--C1L86 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|in_read_drclk~138
--operation mode is normal

C1L86 = C1_dffe4 & (C1_wire_cntr6_q_int[4] & (C1L76 # !C1L1) # !C1_wire_cntr6_q_int[4] & (C1L1));


--C1_data_valid_en is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|data_valid_en
--operation mode is normal

C1_data_valid_en = C1_wire_cntr6_q_int[4] & C1_wire_cntr6_q_int[1] & C1_wire_cntr6_q_int[3];


--C1_dffe5 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe5
--operation mode is normal

C1_dffe5_lut_out = C1_dffe4;
C1_dffe5 = DFFEAS(C1_dffe5_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--C1L37 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|mux_nread~159
--operation mode is normal

C1L37 = !C1_wire_cntr6_q_int[4] & !C1_wire_cntr6_q_int[1] & !C1_wire_cntr6_q_int[3] & !C1_wire_cntr6_q_int[2];


--C1_start_decode is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|start_decode
--operation mode is normal

C1_start_decode = !C1_wire_maxii_ufm_block1_bgpbusy & (C1L37 & (!C1_dffe5) # !C1L37 & !C1_data_valid_en);


--C1_dffe3 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe3
--operation mode is normal

C1_dffe3_lut_out = C1_dffe2;
C1_dffe3 = DFFEAS(C1_dffe3_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--C1_start_op is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|start_op
--operation mode is normal

C1_start_op = C1_wire_cntr6_q_int[4] & (C1L67 # C1_start_decode & !C1_dffe3) # !C1_wire_cntr6_q_int[4] & (C1_start_decode & !C1_dffe3);


--C1L3 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~76
--operation mode is normal

C1L3_carry_eqn = C1L7;
C1L3 = C1_wire_cntr6_q_int[4] $ (!C1L3_carry_eqn);


--C1L4 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~81
--operation mode is arithmetic

C1L4_carry_eqn = C1L9;
C1L4 = C1_wire_cntr6_q_int[1] $ (C1L4_carry_eqn);

--C1L5 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~83
--operation mode is arithmetic

C1L5 = CARRY(!C1L9 # !C1_wire_cntr6_q_int[1]);


--C1L6 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~86
--operation mode is arithmetic

C1L6_carry_eqn = C1L11;
C1L6 = C1_wire_cntr6_q_int[3] $ (C1L6_carry_eqn);

--C1L7 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~88
--operation mode is arithmetic

C1L7 = CARRY(!C1L11 # !C1_wire_cntr6_q_int[3]);


--C1L8 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~91
--operation mode is arithmetic

C1L8 = !C1_wire_cntr6_q_int[0];

--C1L9 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~93
--operation mode is arithmetic

C1L9 = CARRY(C1_wire_cntr6_q_int[0]);


--C1L01 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~96
--operation mode is arithmetic

C1L01_carry_eqn = C1L5;
C1L01 = C1_wire_cntr6_q_int[2] $ (!C1L01_carry_eqn);

--C1L11 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add~98
--operation mode is arithmetic

C1L11 = CARRY(C1_wire_cntr6_q_int[2] & (!C1L5));


--C1_dffe9a[2] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe9a[2]
--operation mode is normal

C1_dffe9a[2]_lut_out = C1_dffe4 & (C1L2 & timer[23] # !C1L2 & (C1_dffe9a[1])) # !C1_dffe4 & (C1_dffe9a[1]);
C1_dffe9a[2] = DFFEAS(C1_dffe9a[2]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_ufm_arshft, , , , );


--C1L68 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|wire_cntr6_q_int[2]~262
--operation mode is normal

C1L68 = !C1_wire_cntr6_q_int[1] & !C1_wire_cntr6_q_int[2];


--C1L2 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|add_load~88
--operation mode is normal

C1L2 = C1_wire_cntr6_q_int[4] # C1_wire_cntr6_q_int[3] & (!C1L68) # !C1_wire_cntr6_q_int[3] & !C1_wire_cntr6_q_int[0] & C1L68;


--C1_dffe10a7[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a7[0]
--operation mode is normal

C1_dffe10a7[0]_lut_out = C1_dffe10a6[0];
C1_dffe10a7[0] = DFFEAS(C1_dffe10a7[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--timer[22] is timer[22]
--operation mode is arithmetic

timer[22]_carry_eqn = A1L66;
timer[22]_lut_out = timer[22] $ (!timer[22]_carry_eqn);
timer[22] = DFFEAS(timer[22]_lut_out, A1L4, reset_, , , , , , );

--A1L86 is timer[22]~184
--operation mode is arithmetic

A1L86 = CARRY(timer[22] & (!A1L66));


--C1_dffe2 is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe2
--operation mode is normal

C1_dffe2_lut_out = C1_start_decode;
C1_dffe2 = DFFEAS(C1_dffe2_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--C1_dffe9a[1] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe9a[1]
--operation mode is normal

C1_dffe9a[1]_lut_out = C1_dffe4 & (C1L2 & timer[22] # !C1L2 & (C1_dffe9a[0])) # !C1_dffe4 & (C1_dffe9a[0]);
C1_dffe9a[1] = DFFEAS(C1_dffe9a[1]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1_ufm_arshft, , , , );


--C1_dffe10a6[0] is UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|dffe10a6[0]
--operation mode is normal

C1_dffe10a6[0]_lut_out = C1_dffe10a5[0];
C1_dffe10a6[0] = DFFEAS(C1_dffe10a6[0]_lut_out, C1_wire_maxii_ufm_block1_osc, VCC, , C1L86, , , , );


--timer[21] is timer[21]
--operation mode is arithmetic

timer[21]_carry_eqn = A1L46;
timer[21]_lut_out = timer[21] $ (timer[21]_carry_eqn);
timer[21] = DFFEAS(timer[21]_lut_out, A1L4, reset_, , , , , , );