📄 main.fit.rpt
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; C4s ; 35 / 784 ( 4 % ) ;
; Direct links ; 17 / 888 ( 1 % ) ;
; Global clocks ; 3 / 4 ( 75 % ) ;
; LAB clocks ; 10 / 32 ( 31 % ) ;
; LUT chains ; 1 / 216 ( < 1 % ) ;
; Local interconnects ; 73 / 888 ( 8 % ) ;
; R4s ; 34 / 704 ( 4 % ) ;
+----------------------------+-------------------+
+---------------------------------------------------------------------------+
; LAB Logic Elements ;
+--------------------------------------------+------------------------------+
; Number of Logic Elements (Average = 6.00) ; Number of LABs (Total = 14) ;
+--------------------------------------------+------------------------------+
; 1 ; 4 ;
; 2 ; 0 ;
; 3 ; 1 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 2 ;
; 8 ; 0 ;
; 9 ; 1 ;
; 10 ; 5 ;
+--------------------------------------------+------------------------------+
+-------------------------------------------------------------------+
; LAB-wide Signals ;
+------------------------------------+------------------------------+
; LAB-wide Signals (Average = 1.43) ; Number of LABs (Total = 14) ;
+------------------------------------+------------------------------+
; 1 Async. clear ; 3 ;
; 1 Clock ; 10 ;
; 1 Clock enable ; 4 ;
; 2 Clock enables ; 2 ;
; 2 Clocks ; 1 ;
+------------------------------------+------------------------------+
+----------------------------------------------------------------------------+
; LAB Signals Sourced ;
+---------------------------------------------+------------------------------+
; Number of Signals Sourced (Average = 6.29) ; Number of LABs (Total = 14) ;
+---------------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 4 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 2 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 2 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 4 ;
; 11 ; 2 ;
+---------------------------------------------+------------------------------+
+--------------------------------------------------------------------------------+
; LAB Signals Sourced Out ;
+-------------------------------------------------+------------------------------+
; Number of Signals Sourced Out (Average = 3.21) ; Number of LABs (Total = 14) ;
+-------------------------------------------------+------------------------------+
; 0 ; 2 ;
; 1 ; 4 ;
; 2 ; 1 ;
; 3 ; 1 ;
; 4 ; 2 ;
; 5 ; 1 ;
; 6 ; 2 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 1 ;
+-------------------------------------------------+------------------------------+
+----------------------------------------------------------------------------+
; LAB Distinct Inputs ;
+---------------------------------------------+------------------------------+
; Number of Distinct Inputs (Average = 4.64) ; Number of LABs (Total = 14) ;
+---------------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 3 ;
; 3 ; 3 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 1 ;
; 7 ; 0 ;
; 8 ; 5 ;
+---------------------------------------------+------------------------------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version
Info: Processing started: Wed Jan 02 13:01:14 2008
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off MAX_UFM -c Main
Info: Selected device EPM240T100C5 for design "Main"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices.
Info: Device EPM240T100I5 is compatible
Info: Device EPM570T100C5 is compatible
Info: Device EPM570T100I5 is compatible
Info: Detected fmax, tsu, tco, and/or tpd requirements -- optimizing circuit to achieve only the specified requirements
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: Automatically promoted some destinations of signal "UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|wire_maxii_ufm_block1_osc" to use Global clock
Info: Destination "UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|ufm_drclk" may be non-global or may not use global clock
Info: Destination "UFM:ufm|UFM_altufm_parallel_nqi:UFM_altufm_parallel_nqi_component|ufm_arclk" may be non-global or may not use global clock
Info: Automatically promoted signal "clk~7" to use Global clock
Info: Automatically promoted signal "reset_" to use Global clock
Info: Pin "reset_" drives global clock, but is not placed in a dedicated clock pin position
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Moving registers into LUTs to improve timing and density
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished moving registers into LUTs
Info: Finished register packing
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Estimated most critical path is register to register delay of 5.059 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X2_Y3; Fanout = 3; REG Node = 'timer[2]'
Info: 2: + IC(0.949 ns) + CELL(0.978 ns) = 1.927 ns; Loc. = LAB_X2_Y3; Fanout = 2; COMB Node = 'timer[2]~264'
Info: 3: + IC(0.000 ns) + CELL(0.123 ns) = 2.050 ns; Loc. = LAB_X2_Y3; Fanout = 2; COMB Node = 'timer[3]~260'
Info: 4: + IC(0.000 ns) + CELL(0.123 ns) = 2.173 ns; Loc. = LAB_X2_Y3; Fanout = 2; COMB Node = 'timer[4]~256'
Info: 5: + IC(0.000 ns) + CELL(0.123 ns) = 2.296 ns; Loc. = LAB_X2_Y3; Fanout = 2; COMB Node = 'timer[5]~252'
Info: 6: + IC(0.000 ns) + CELL(0.399 ns) = 2.695 ns; Loc. = LAB_X2_Y3; Fanout = 6; COMB Node = 'timer[6]~248'
Info: 7: + IC(0.000 ns) + CELL(0.246 ns) = 2.941 ns; Loc. = LAB_X3_Y3; Fanout = 6; COMB Node = 'timer[11]~228'
Info: 8: + IC(0.000 ns) + CELL(0.246 ns) = 3.187 ns; Loc. = LAB_X3_Y3; Fanout = 6; COMB Node = 'timer[16]~208'
Info: 9: + IC(0.000 ns) + CELL(0.246 ns) = 3.433 ns; Loc. = LAB_X4_Y3; Fanout = 3; COMB Node = 'timer[21]~188'
Info: 10: + IC(0.000 ns) + CELL(1.626 ns) = 5.059 ns; Loc. = LAB_X4_Y3; Fanout = 3; REG Node = 'timer[24]'
Info: Total cell delay = 4.110 ns ( 81.24 % )
Info: Total interconnect delay = 0.949 ns ( 18.76 % )
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Fitter routing operations beginning
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time.
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
Info: Processing ended: Wed Jan 02 13:01:15 2008
Info: Elapsed time: 00:00:02
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