top.hif

RS编码的verilog源代码

SCBLOCK.V
ba892a2cf1d0d97c5caa206236251874
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|SCblock:SCblock|syndcell_4:cell_4
}
# end
# entity
syndcell_5
# storage
db|top.(18).cnf
db|top.(18).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
SCBLOCK.V
ba892a2cf1d0d97c5caa206236251874
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|SCblock:SCblock|syndcell_5:cell_5
}
# end
# entity
syndcell_6
# storage
db|top.(19).cnf
db|top.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
SCBLOCK.V
ba892a2cf1d0d97c5caa206236251874
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|SCblock:SCblock|syndcell_6:cell_6
}
# end
# entity
syndcell_7
# storage
db|top.(20).cnf
db|top.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
SCBLOCK.V
ba892a2cf1d0d97c5caa206236251874
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|SCblock:SCblock|syndcell_7:cell_7
}
# end
# entity
syndcell_8
# storage
db|top.(21).cnf
db|top.(21).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
SCBLOCK.V
ba892a2cf1d0d97c5caa206236251874
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|SCblock:SCblock|syndcell_8:cell_8
}
# end
# entity
syndcell_9
# storage
db|top.(22).cnf
db|top.(22).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
SCBLOCK.V
ba892a2cf1d0d97c5caa206236251874
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|SCblock:SCblock|syndcell_9:cell_9
}
# end
# entity
syndcell_10
# storage
db|top.(23).cnf
db|top.(23).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
SCBLOCK.V
ba892a2cf1d0d97c5caa206236251874
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|SCblock:SCblock|syndcell_10:cell_10
}
# end
# entity
syndcell_11
# storage
db|top.(24).cnf
db|top.(24).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
SCBLOCK.V
ba892a2cf1d0d97c5caa206236251874
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|SCblock:SCblock|syndcell_11:cell_11
}
# end
# entity
KES_block
# storage
db|top.(25).cnf
db|top.(25).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock
}
# end
# entity
PE
# storage
db|top.(26).cnf
db|top.(26).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE0
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE3
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE4
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE5
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE6
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE7
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE8
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE9
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE10
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE11
}
# end
# entity
lcpmult
# storage
db|top.(27).cnf
db|top.(27).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
common_modules.v
b0f73556532d9521a486fe14a7492
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE0|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE0|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE1|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE1|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE2|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE2|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE3|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE3|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE4|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE4|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE5|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE5|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE6|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE6|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE7|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE7|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE8|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE8|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE9|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE9|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE10|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE10|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE11|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE11|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE12|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE12|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE13|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE13|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE14|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE14|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE15|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE15|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE16|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE16|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE17|lcpmult:multiplier1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE17|lcpmult:multiplier2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_18:PE18|lcpmult:multiplier
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|lcpmult:multiplier
}
# end
# entity
register_pe
# storage
db|top.(28).cnf
db|top.(28).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE0|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE0|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE1|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE1|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE2|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE2|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE3|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE3|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE4|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE4|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE5|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE5|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE6|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE6|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE7|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE7|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE8|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE8|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE9|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE9|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE10|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE10|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE11|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE11|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE12|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE12|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE13|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE13|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE14|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE14|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE15|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE15|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE16|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE16|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE17|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE17|register_pe:reg2
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_18:PE18|register_pe:reg1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_18:PE18|register_pe:reg2
}
# end
# entity
mux2_to_1
# storage
db|top.(29).cnf
db|top.(29).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
common_modules.v
b0f73556532d9521a486fe14a7492
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE0|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE1|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE2|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE3|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE4|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE5|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE6|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE7|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE8|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE9|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE10|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE11|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE12|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE13|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE14|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE15|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE16|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE17|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_18:PE18|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|control:mcontrol|mux2_to_1:multiplexer1
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|control:mcontrol|mux2_to_1:multiplexer2
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree0_cell:cs0_cell|mux2_to_1:multiplex
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree1_cell:cs1_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree2_cell:cs2_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree3_cell:cs3_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree4_cell:cs4_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree5_cell:cs5_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree6_cell:cs6_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree0_cell:fn0_cell|mux2_to_1:multiplex
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree1_cell:fn1_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree2_cell:fn2_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree3_cell:fn3_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree4_cell:fn4_cell|mux2_to_1:multiplexer
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree5_cell:fn5_cell|mux2_to_1:multiplexer
}
# end
# entity
PE_12
# storage
db|top.(30).cnf
db|top.(30).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE12
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE13
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE14
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE15
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE16
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_12:PE17
}
# end
# entity
PE_18
# storage
db|top.(31).cnf
db|top.(31).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE_18:PE18
}
# end
# entity
control
# storage
db|top.(32).cnf
db|top.(32).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
st0
000
PARAMETER_BIN
DEF
st1
001
PARAMETER_BIN
DEF
st2
010
PARAMETER_BIN
DEF
st3
011
PARAMETER_BIN
DEF
st4
100
PARAMETER_BIN
DEF
st5
101
PARAMETER_BIN
DEF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|control:mcontrol
}
# end
# entity
fulladder
# storage
db|top.(33).cnf
db|top.(33).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|control:mcontrol|fulladder:adder
}
# end
# entity
regamma
# storage
db|top.(34).cnf
db|top.(34).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|control:mcontrol|regamma:reggamma
}
# end
# entity
regkr
# storage
db|top.(35).cnf
db|top.(35).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|control:mcontrol|regkr:regkr
}
# end
# entity
priority_encoder
# storage
db|top.(36).cnf
db|top.(36).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
KESBLOCK.V
86f26ce85d6aa7eac83541d36375d0
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|priority_encoder:pencoder
}
# end
# entity
CSEEblock
# storage
db|top.(37).cnf
db|top.(37).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
CSEEBLOCK.v
f9b3e4981dcde6166d2e36cb5641a1d
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
st0
0
PARAMETER_DEC
DEF
st1
1
PARAMETER_DEC
DEF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock
}
# end
# entity
degree0_cell
# storage
db|top.(38).cnf
db|top.(38).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
CSEEBLOCK.v
f9b3e4981dcde6166d2e36cb5641a1d
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree0_cell:cs0_cell
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree0_cell:fn0_cell
}
# end
# entity
register5_wl
# storage
db|top.(39).cnf
db|top.(39).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
common_modules.v
b0f73556532d9521a486fe14a7492
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree0_cell:cs0_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree1_cell:cs1_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree2_cell:cs2_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree3_cell:cs3_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree4_cell:cs4_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree5_cell:cs5_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree6_cell:cs6_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree0_cell:fn0_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree1_cell:fn1_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree2_cell:fn2_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree3_cell:fn3_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree4_cell:fn4_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree5_cell:fn5_cell|register5_wl:register
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|register5_wl:erroreg
RSDecoder:inst1|rsdec:rsdec|fifo_register:fiforeg|register5_wl:outreg
}
# end
# entity
degree1_cell
# storage
db|top.(40).cnf
db|top.(40).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
CSEEBLOCK.v
f9b3e4981dcde6166d2e36cb5641a1d
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree1_cell:cs1_cell
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree1_cell:fn1_cell
}
# end
# entity
degree2_cell
# storage
db|top.(41).cnf
db|top.(41).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
CSEEBLOCK.v
f9b3e4981dcde6166d2e36cb5641a1d
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree2_cell:cs2_cell
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree2_cell:fn2_cell
}
# end
# entity
degree3_cell
# storage
db|top.(42).cnf
db|top.(42).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
CSEEBLOCK.v
f9b3e4981dcde6166d2e36cb5641a1d
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree3_cell:cs3_cell
RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|degree3_cell:fn3_cell
}
# end
# entity
degree4_cell
# storage
db|top.(43).cnf
db|top.(43).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
CSEEBLOCK.v
f9b3e4981dcde6166d2e36cb5641a1d
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}