top.fit.eqn

RS编码的verilog源代码

--operation mode is normal

RB1L2 = !SB17_out[0] & !SB17_out[3] & !SB17_out[2] & RB1L1;


--RB1L5 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|priority_encoder:pencoder|out~423 at LC_X22_Y4_N4
--operation mode is normal

RB1L5 = !SB19_out[1] & (!SB19_out[4]);


--SB19_out[2] is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE9|register_pe:reg1|out[2] at LC_X22_Y9_N9
--operation mode is normal

SB19_out[2]_lut_out = MB10L27;
SB19_out[2] = DFFEAS(SB19_out[2]_lut_out, GLOBAL(M3_clk_out), VCC, , QB1_hold, JC10_out[2], , SB9L7, QB1_state.st1);


--SB19_out[0] is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE9|register_pe:reg1|out[0] at LC_X23_Y10_N0
--operation mode is normal

SB19_out[0]_lut_out = MB10_outadder[0];
SB19_out[0] = DFFEAS(SB19_out[0]_lut_out, GLOBAL(M3_clk_out), VCC, , QB1_hold, JC10_out[0], , SB9L7, QB1_state.st1);


--RB1L6 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|priority_encoder:pencoder|out~424 at LC_X22_Y4_N6
--operation mode is normal

RB1L6 = !SB19_out[0] & RB1L5 & !SB19_out[2] & !SB19_out[3];


--SB23_out[2] is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE11|register_pe:reg1|out[2] at LC_X24_Y11_N3
--operation mode is normal

SB23_out[2]_lut_out = MB12L27;
SB23_out[2] = DFFEAS(SB23_out[2]_lut_out, GLOBAL(M3_clk_out), VCC, , QB1_hold, JC12_out[2], , SB9L7, QB1_state.st1);


--SB23_out[0] is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE11|register_pe:reg1|out[0] at LC_X24_Y11_N6
--operation mode is normal

SB23_out[0]_lut_out = MB12_outadder[0];
SB23_out[0] = DFFEAS(SB23_out[0]_lut_out, GLOBAL(M3_clk_out), VCC, , QB1_hold, JC12_out[0], , SB9L7, QB1_state.st1);


--V1L5 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|koefcomp5~36 at LC_X24_Y11_N2
--operation mode is normal

V1L5 = SB23_out[4] # SB23_out[1];


--V1_koefcomp5 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|koefcomp5 at LC_X24_Y11_N8
--operation mode is normal

V1_koefcomp5 = SB23_out[0] # SB23_out[3] # V1L5 # SB23_out[2];


--SB21_out[2] is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE10|register_pe:reg1|out[2] at LC_X22_Y9_N4
--operation mode is normal

SB21_out[2]_lut_out = MB11L27;
SB21_out[2] = DFFEAS(SB21_out[2]_lut_out, GLOBAL(M3_clk_out), VCC, , QB1_hold, JC11_out[2], , SB9L7, QB1_state.st1);


--SB21_out[0] is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE10|register_pe:reg1|out[0] at LC_X23_Y10_N4
--operation mode is normal

SB21_out[0]_lut_out = MB11_outadder[0];
SB21_out[0] = DFFEAS(SB21_out[0]_lut_out, GLOBAL(M3_clk_out), VCC, , QB1_hold, JC11_out[0], , SB9L7, QB1_state.st1);


--V1L3 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|koefcomp4~34 at LC_X24_Y9_N3
--operation mode is normal

V1L3 = SB21_out[4] # SB21_out[1];


--V1_koefcomp4 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|koefcomp4 at LC_X24_Y9_N4
--operation mode is normal

V1_koefcomp4 = SB21_out[0] # SB21_out[3] # SB21_out[2] # V1L3;


--RB1L7 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|priority_encoder:pencoder|out~425 at LC_X23_Y5_N8
--operation mode is normal

RB1L7 = !V1_koefcomp4 & !V1_koefcomp5 & (!RB1L6 # !RB1L2);


--U1_rootcntr[2] is RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|rootcntr[2] at LC_X22_Y5_N5
--operation mode is normal

U1_rootcntr[2]_lut_out = U1_rootcntr[2] $ (U1_rootcntr[0] & !U1L32 & U1_rootcntr[1]);
U1_rootcntr[2] = DFFEAS(U1_rootcntr[2]_lut_out, !GLOBAL(M3_clk_out), VCC, , , , , !U1_state, );


--Y1L1 is RSDecoder:inst1|rsdec:rsdec|MainControl:controller|Equal~311 at LC_X23_Y5_N3
--operation mode is normal

Y1L1 = U1_rootcntr[2] $ (V1_koefcomp5 # V1_koefcomp4 # V1_koefcomp6);


--Y1L2 is RSDecoder:inst1|rsdec:rsdec|MainControl:controller|Equal~312 at LC_X23_Y5_N2
--operation mode is normal

Y1L2 = !Y1L1 & (U1_rootcntr[1] $ (!RB1L7 & !V1_koefcomp6));


--U1_rootcntr[0] is RSDecoder:inst1|rsdec:rsdec|CSEEblock:CSEEblock|rootcntr[0] at LC_X22_Y5_N7
--operation mode is normal

U1_rootcntr[0]_lut_out = U1_rootcntr[0] $ (!U1L32);
U1_rootcntr[0] = DFFEAS(U1_rootcntr[0]_lut_out, !GLOBAL(M3_clk_out), VCC, , , , , !U1_state, );


--SB15_out[2] is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE7|register_pe:reg1|out[2] at LC_X22_Y3_N2
--operation mode is normal

SB15_out[2]_lut_out = MB8L27;
SB15_out[2] = DFFEAS(SB15_out[2]_lut_out, GLOBAL(M3_clk_out), VCC, , QB1_hold, JC8_out[2], , SB9L7, QB1_state.st1);


--SB15_out[0] is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|PE:PE7|register_pe:reg1|out[0] at LC_X22_Y4_N9
--operation mode is normal

SB15_out[0]_lut_out = MB8_outadder[0];
SB15_out[0] = DFFEAS(SB15_out[0]_lut_out, GLOBAL(M3_clk_out), VCC, , QB1_hold, JC8_out[0], , SB9L7, QB1_state.st1);


--V1L1 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|koefcomp1~27 at LC_X22_Y4_N5
--operation mode is normal

V1L1 = SB15_out[0] # SB15_out[4] # SB15_out[1] # SB15_out[3];


--RB1L3 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|priority_encoder:pencoder|out[0]~426 at LC_X22_Y4_N7
--operation mode is normal

RB1L3 = RB1L2 & (SB15_out[2] # V1L1) # !RB1L6;


--RB1L4 is RSDecoder:inst1|rsdec:rsdec|KES_block:KESblock|priority_encoder:pencoder|out[0]~427 at LC_X23_Y5_N1
--operation mode is normal

RB1L4 = !V1_koefcomp6 & (V1_koefcomp5 # !V1_koefcomp4 & RB1L3);


--Y1L3 is RSDecoder:inst1|rsdec:rsdec|MainControl:controller|Equal~313 at LC_X23_Y5_N0
--operation mode is normal

Y1L3 = Y1L2 & (U1_rootcntr[0] $ !RB1L4);


--Y1_state1.st1_7 is RSDecoder:inst1|rsdec:rsdec|MainControl:controller|state1.st1_7 at LC_X24_Y5_N8
--operation mode is normal

Y1_state1.st1_7_lut_out = Y1_state1.st1_6 # Y1_state1.st1_7 & !R1_wordstart & !Y1L52;
Y1_state1.st1_7 = DFFEAS(Y1_state1.st1_7_lut_out, GLOBAL(M3_clk_out), GLOBAL(reset), , , , , , );


--D1_cnt[1] is nrz:inst2|cnt[1] at LC_X12_Y9_N6
--operation mode is normal

D1_cnt[1]_lut_out = D1_cnt[0] $ D1_cnt[1];
D1_cnt[1] = DFFEAS(D1_cnt[1]_lut_out, GLOBAL(KC1_clk_out), GLOBAL(reset), , , , , , );


--D1_cnt[0] is nrz:inst2|cnt[0] at LC_X12_Y9_N4
--operation mode is normal

D1_cnt[0]_lut_out = D1_cnt[2] & D1_cnt[1] # !D1_cnt[0];
D1_cnt[0] = DFFEAS(D1_cnt[0]_lut_out, GLOBAL(KC1_clk_out), GLOBAL(reset), , , , , , );


--D1_cnt[2] is nrz:inst2|cnt[2] at LC_X12_Y9_N8
--operation mode is normal

D1_cnt[2]_lut_out = D1_cnt[2] # D1_cnt[0] & D1_cnt[1];
D1_cnt[2] = DFFEAS(D1_cnt[2]_lut_out, GLOBAL(KC1_clk_out), GLOBAL(reset), , , , , , );


--F1_cnt[6] is error:inst6|cnt[6] at LC_X10_Y14_N6
--operation mode is arithmetic

F1_cnt[6]_carry_eqn = (!F1L19 & F1L23) # (F1L19 & F1L24);
F1_cnt[6]_lut_out = F1_cnt[6] $ (!F1_cnt[6]_carry_eqn);
F1_cnt[6] = DFFEAS(F1_cnt[6]_lut_out, GLOBAL(MC1__clk0), VCC, , , , , , );

--F1L26 is error:inst6|cnt[6]~57 at LC_X10_Y14_N6
--operation mode is arithmetic

F1L26_cout_0 = F1_cnt[6] & (!F1L23);
F1L26 = CARRY(F1L26_cout_0);

--F1L27 is error:inst6|cnt[6]~57COUT1_104 at LC_X10_Y14_N6
--operation mode is arithmetic

F1L27_cout_1 = F1_cnt[6] & (!F1L24);
F1L27 = CARRY(F1L27_cout_1);


--F1_cnt[4] is error:inst6|cnt[4] at LC_X10_Y14_N4
--operation mode is arithmetic

F1_cnt[4]_lut_out = F1_cnt[4] $ !F1L16;
F1_cnt[4] = DFFEAS(F1_cnt[4]_lut_out, GLOBAL(MC1__clk0), VCC, , , , , , );

--F1L19 is error:inst6|cnt[4]~61 at LC_X10_Y14_N4
--operation mode is arithmetic

F1L19 = F1L20;


--F1_cnt[5] is error:inst6|cnt[5] at LC_X10_Y14_N5
--operation mode is arithmetic

F1_cnt[5]_carry_eqn = (!F1L19 & GND) # (F1L19 & VCC);
F1_cnt[5]_lut_out = F1_cnt[5] $ F1_cnt[5]_carry_eqn;
F1_cnt[5] = DFFEAS(F1_cnt[5]_lut_out, GLOBAL(MC1__clk0), VCC, , , , , , );

--F1L23 is error:inst6|cnt[5]~65 at LC_X10_Y14_N5
--operation mode is arithmetic

F1L23_cout_0 = !F1L19 # !F1_cnt[5];
F1L23 = CARRY(F1L23_cout_0);

--F1L24 is error:inst6|cnt[5]~65COUT1_102 at LC_X10_Y14_N5
--operation mode is arithmetic

F1L24_cout_1 = !F1L19 # !F1_cnt[5];
F1L24 = CARRY(F1L24_cout_1);


--F1_cnt[2] is error:inst6|cnt[2] at LC_X10_Y14_N2
--operation mode is arithmetic

F1_cnt[2]_lut_out = F1_cnt[2] $ (!F1L10);
F1_cnt[2] = DFFEAS(F1_cnt[2]_lut_out, GLOBAL(MC1__clk0), VCC, , , , , , );

--F1L13 is error:inst6|cnt[2]~69 at LC_X10_Y14_N2
--operation mode is arithmetic

F1L13_cout_0 = F1_cnt[2] & (!F1L10);
F1L13 = CARRY(F1L13_cout_0);

--F1L14 is error:inst6|cnt[2]~69COUT1_99 at LC_X10_Y14_N2
--operation mode is arithmetic

F1L14_cout_1 = F1_cnt[2] & (!F1L11);
F1L14 = CARRY(F1L14_cout_1);


--F1_cnt[7] is error:inst6|cnt[7] at LC_X10_Y14_N7
--operation mode is normal

F1_cnt[7]_carry_eqn = (!F1L19 & F1L26) # (F1L19 & F1L27);
F1_cnt[7]_lut_out = F1_cnt[7] $ (F1_cnt[7]_carry_eqn);
F1_cnt[7] = DFFEAS(F1_cnt[7]_lut_out, GLOBAL(MC1__clk0), VCC, , , , , , );


--F1L1 is error:inst6|always0~617 at LC_X10_Y14_N9
--operation mode is normal

F1L1 = F1_cnt[2] # F1_cnt[7] & F1_cnt[4] # !F1_cnt[7] & (F1_cnt[5]);


--F1_cnt[1] is error:inst6|cnt[1] at LC_X10_Y14_N1
--operation mode is arithmetic

F1_cnt[1]_lut_out = F1_cnt[1] $ (F1L7);
F1_cnt[1] = DFFEAS(F1_cnt[1]_lut_out, GLOBAL(MC1__clk0), VCC, , , , , , );

--F1L10 is error:inst6|cnt[1]~77 at LC_X10_Y14_N1
--operation mode is arithmetic

F1L10_cout_0 = !F1L7 # !F1_cnt[1];
F1L10 = CARRY(F1L10_cout_0);

--F1L11 is error:inst6|cnt[1]~77COUT1_97 at LC_X10_Y14_N1
--operation mode is arithmetic

F1L11_cout_1 = !F1L8 # !F1_cnt[1];
F1L11 = CARRY(F1L11_cout_1);


--F1_cnt[0] is error:inst6|cnt[0] at LC_X10_Y14_N0
--operation mode is arithmetic

F1_cnt[0]_lut_out = !F1_cnt[0];
F1_cnt[0] = DFFEAS(F1_cnt[0]_lut_out, GLOBAL(MC1__clk0), VCC, , , , , , );

--F1L7 is error:inst6|cnt[0]~81 at LC_X10_Y14_N0