📄 fifo89_timesim.nlf

📁 在ISE环境下用VHDL写的8*9FIFO

💻 NLF

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Release 9.1.03i - netgen J.33Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.Command Line: netgen -intstyle ise -s 6 -pcf fifo89.pcf -rpw 100 -tpw 0 -ar
Structure -tm fifo89 -insert_pp_buffers false -w -dir netgen/par -ofmt vhdl -sim
fifo89.ncd fifo89_timesim.vhd  Read and Annotate design 'fifo89.ncd' ...Loading device for application Rf_Device from file '2s15.nph' in environment
G:\Xilinx91i.   "fifo89" is an NCD, version 3.1, device xc2s15, package cs144, speed -6Loading constraints from 'fifo89.pcf'...The speed grade (-6) differs from the speed grade specified in the .ncd file
(-6).The number of routable networks is 124Flattening design ...Processing design ...   Preping design's networks ...  Preping design's macros ...Writing VHDL netlist 'F:\vhdl\fifos\fifo_exp1\netgen\par\fifo89_timesim.vhd' ...Writing VHDL SDF file 'F:\vhdl\fifos\fifo_exp1\netgen\par\fifo89_timesim.sdf'
...INFO:NetListWriters:635 - The generated VHDL netlist contains Xilinx SIMPRIM
   simulation primitives and has to be used with SIMPRIM library for correct
   compilation and simulation. Number of warnings: 0Number of info messages: 1Total memory usage is 77324 kilobytes

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