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Name Pt No. Type Use
data_out<0> 9 FB2_1 75 I/O O
data_out<1> 9 FB2_2 76 I/O O
data_out<2> 9 FB2_3 77 I/O O
data_out<3> 9 FB2_4 78 I/O O
(unused) 0 FB2_5 79 I/O I
(unused) 0 FB2_6 80 I/O I
(unused) 0 FB2_7 81 I/O I
(unused) 0 FB2_8 (b)
(unused) 0 FB2_9 (b)
(unused) 0 FB2_10 (b)
(unused) 0 FB2_11 83 I/O I
(unused) 0 FB2_12 84 I/O
(unused) 0 FB2_13 85 I/O
rdptr<0> 3 FB2_14 (b) (b) clk
rdptr<1> 3 FB2_15 (b) (b) clk
rdptr<2> 3 FB2_16 (b) (b) clk
Signals Used by Logic in Function Block
1: fifo_0_0 14: fifo_3_1 27: fifo_6_2
2: fifo_0_1 15: fifo_3_2 28: fifo_6_3
3: fifo_0_2 16: fifo_3_3 29: fifo_7_0
4: fifo_0_3 17: fifo_4_0 30: fifo_7_1
5: fifo_1_0 18: fifo_4_1 31: fifo_7_2
6: fifo_1_1 19: fifo_4_2 32: fifo_7_3
7: fifo_1_2 20: fifo_4_3 33: rdinc
8: fifo_1_3 21: fifo_5_0 34: rdptr<0>
9: fifo_2_0 22: fifo_5_1 35: rdptr<1>
10: fifo_2_1 23: fifo_5_2 36: rdptr<2>
11: fifo_2_2 24: fifo_5_3 37: rdptrclr
12: fifo_2_3 25: fifo_6_0 38: rst
13: fifo_3_0 26: fifo_6_1
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
data_out<0> X...X...X...X...X...X...X...X....XXX.... 11
data_out<1> .X...X...X...X...X...X...X...X...XXX.... 11
data_out<2> ..X...X...X...X...X...X...X...X..XXX.... 11
data_out<3> ...X...X...X...X...X...X...X...X.XXX.... 11
rdptr<0> ................................XX..XX.. 4
rdptr<1> ................................XXX.XX.. 5
rdptr<2> ................................XXXXXX.. 6
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 38/2
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 0/8
Number of PLA product terms used/remaining: 34/14
Number of function block global clocks used/remaining: 1/1
Signal Total Loc Pin Pin Pin GCK
Name Pt No. Type Use
(unused) 0 FB3_1 (b)
wrptr<0> 3 FB3_2 62 TCK/I/O (b) clk
data_out<4> 9 FB3_3 61 I/O O
data_out<5> 9 FB3_4 60 I/O O
(unused) 0 FB3_5 (b)
data_out<6> 9 FB3_6 58 I/O O
data_out<7> 9 FB3_7 57 I/O O
(unused) 0 FB3_8 (b)
(unused) 0 FB3_9 (b)
(unused) 0 FB3_10 (b)
(unused) 0 FB3_11 56 I/O
(unused) 0 FB3_12 55 I/O
(unused) 0 FB3_13 54 I/O
(unused) 0 FB3_14 53 I/O
(unused) 0 FB3_15 52 I/O
(unused) 0 FB3_16 (b)
Signals Used by Logic in Function Block
1: fifo_0_4 14: fifo_3_5 27: fifo_6_6
2: fifo_0_5 15: fifo_3_6 28: fifo_6_7
3: fifo_0_6 16: fifo_3_7 29: fifo_7_4
4: fifo_0_7 17: fifo_4_4 30: fifo_7_5
5: fifo_1_4 18: fifo_4_5 31: fifo_7_6
6: fifo_1_5 19: fifo_4_6 32: fifo_7_7
7: fifo_1_6 20: fifo_4_7 33: rdptr<0>
8: fifo_1_7 21: fifo_5_4 34: rdptr<1>
9: fifo_2_4 22: fifo_5_5 35: rdptr<2>
10: fifo_2_5 23: fifo_5_6 36: wrinc
11: fifo_2_6 24: fifo_5_7 37: wrptr<0>
12: fifo_2_7 25: fifo_6_4 38: wrptrclr
13: fifo_3_4 26: fifo_6_5
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
wrptr<0> ...................................XXX.. 3
data_out<4> X...X...X...X...X...X...X...X...XXX..... 11
data_out<5> .X...X...X...X...X...X...X...X..XXX..... 11
data_out<6> ..X...X...X...X...X...X...X...X.XXX..... 11
data_out<7> ...X...X...X...X...X...X...X...XXXX..... 11
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 19/21
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 1/7
Number of PLA product terms used/remaining: 37/11
Number of function block global clocks used/remaining: 1/1
Signal Total Loc Pin Pin Pin GCK
Name Pt No. Type Use
fifo_4_1 3 FB4_1 (b) (b) clk
data_out<8> 9 FB4_2 40 I/O O
fifo_6_2 3 FB4_3 41 I/O I clk
fifo_5_2 3 FB4_4 42 I/O I clk
fifo_4_2 3 FB4_5 44 I/O I clk
fifo_3_2 3 FB4_6 45 I/O (b) clk
fifo_2_2 3 FB4_7 46 I/O (b) clk
fifo_3_1 3 FB4_8 (b) (b) clk
fifo_2_1 3 FB4_9 (b) (b) clk
fifo_1_1 3 FB4_10 (b) (b) clk
fifo_1_2 3 FB4_11 47 I/O (b) clk
fifo_7_1 3 FB4_12 48 I/O (b) clk
fifo_6_1 3 FB4_13 49 I/O (b) clk
fifo_5_1 3 FB4_14 50 I/O (b) clk
wrptr<2> 3 FB4_15 (b) (b) clk
wrptr<1> 3 FB4_16 (b) (b) clk
Signals Used by Logic in Function Block
1: data_in<1> 8: fifo_5_8 14: wr
2: data_in<2> 9: fifo_6_8 15: wrinc
3: fifo_0_8 10: fifo_7_8 16: wrptr<0>
4: fifo_1_8 11: rdptr<0> 17: wrptr<1>
5: fifo_2_8 12: rdptr<1> 18: wrptr<2>
6: fifo_3_8 13: rdptr<2> 19: wrptrclr
7: fifo_4_8
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
fifo_4_1 X............X.XXX...................... 5
data_out<8> ..XXXXXXXXXXX........................... 11
fifo_6_2 .X...........X.XXX...................... 5
fifo_5_2 .X...........X.XXX...................... 5
fifo_4_2 .X...........X.XXX...................... 5
fifo_3_2 .X...........X.XXX...................... 5
fifo_2_2 .X...........X.XXX...................... 5
fifo_3_1 X............X.XXX...................... 5
fifo_2_1 X............X.XXX...................... 5
fifo_1_1 X............X.XXX...................... 5
fifo_1_2 .X...........X.XXX...................... 5
fifo_7_1 X............X.XXX...................... 5
fifo_6_1 X............X.XXX...................... 5
fifo_5_1 X............X.XXX...................... 5
wrptr<2> ..............XXXXX..................... 5
wrptr<1> ..............XXX.X..................... 4
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB5 ***********************************
Number of function block inputs used/remaining: 7/33
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 1/7
Number of PLA product terms used/remaining: 30/18
Number of function block global clocks used/remaining: 1/1
Signal Total Loc Pin Pin Pin GCK
Name Pt No. Type Use
fifo_2_5 3 FB5_1 2 I/O (b) clk
fifo_1_5 3 FB5_2 1 I/O (b) clk
fifo_7_4 3 FB5_3 100 I/O (b) clk
fifo_6_4 3 FB5_4 99 I/O (b) clk
fifo_5_4 3 FB5_5 98 I/O (b) clk
fifo_4_4 3 FB5_6 97 I/O (b) clk
fifo_3_4 3 FB5_7 96 I/O (b) clk
fifo_6_3 3 FB5_8 (b) (b) clk
fifo_5_3 3 FB5_9 (b) (b) clk
fifo_4_3 3 FB5_10 (b) (b) clk
fifo_3_3 3 FB5_11 (b) (b) clk
fifo_2_3 3 FB5_12 (b) (b) clk
fifo_2_4 3 FB5_13 94 I/O (b) clk
fifo_1_4 3 FB5_14 93 I/O (b) clk
fifo_7_3 3 FB5_15 92 I/O (b) clk
fifo_1_3 3 FB5_16 (b) (b) clk
Signals Used by Logic in Function Block
1: data_in<3> 4: wr 6: wrptr<1>
2: data_in<4> 5: wrptr<0> 7: wrptr<2>
3: data_in<5>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
fifo_2_5 ..XXXXX................................. 5
fifo_1_5 ..XXXXX................................. 5
fifo_7_4 .X.XXXX................................. 5
fifo_6_4 .X.XXXX................................. 5
fifo_5_4 .X.XXXX................................. 5
fifo_4_4 .X.XXXX................................. 5
fifo_3_4 .X.XXXX................................. 5
fifo_6_3 X..XXXX................................. 5
fifo_5_3 X..XXXX................................. 5
fifo_4_3 X..XXXX................................. 5
fifo_3_3 X..XXXX................................. 5
fifo_2_3 X..XXXX................................. 5
fifo_2_4 .X.XXXX................................. 5
fifo_1_4 .X.XXXX................................. 5
fifo_7_3 X..XXXX................................. 5
fifo_1_3 X..XXXX................................. 5
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB6 ***********************************
Number of function block inputs used/remaining: 7/33
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 1/7
Number of PLA product terms used/remaining: 30/18
Number of function block global clocks used/remaining: 1/1
Signal Total Loc Pin Pin Pin GCK
Name Pt No. Type Use
fifo_7_6 3 FB6_1 (b) (b) clk
fifo_1_6 3 FB6_2 4 TDI/I/O (b) clk
fifo_2_8 3 FB6_3 5 I/O (b) clk
fifo_1_8 3 FB6_4 6 I/O (b) clk
fifo_7_7 3 FB6_5 7 I/O (b) clk
fifo_6_7 3 FB6_6 8 I/O (b) clk
fifo_5_7 3 FB6_7 9 I/O (b) clk
fifo_6_6 3 FB6_8 (b) (b) clk
fifo_5_6 3 FB6_9 (b) (b) clk
fifo_4_6 3 FB6_10 (b) (b) clk
fifo_4_7 3 FB6_11 10 I/O (b) clk
fifo_3_6 3 FB6_12 (b) (b) clk
fifo_2_6 3 FB6_13 (b) (b) clk
fifo_3_7 3 FB6_14 12 I/O (b) clk
fifo_2_7 3 FB6_15 13 I/O (b) clk
fifo_1_7 3 FB6_16 14 I/O (b) clk
Signals Used by Logic in Function Block
1: data_in<6> 4: wr 6: wrptr<1>
2: data_in<7> 5: wrptr<0> 7: wrptr<2>
3: data_in<8>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
fifo_7_6 X..XXXX................................. 5
fifo_1_6 X..XXXX................................. 5
fifo_2_8 ..XXXXX................................. 5
fifo_1_8 ..XXXXX................................. 5
fifo_7_7 .X.XXXX................................. 5
fifo_6_7 .X.XXXX................................. 5
fifo_5_7 .X.XXXX................................. 5
fifo_6_6 X..XXXX................................. 5
fifo_5_6 X..XXXX................................. 5
fifo_4_6 X..XXXX................................. 5
fifo_4_7 .X.XXXX................................. 5
fifo_3_6 X..XXXX................................. 5
fifo_2_6 X..XXXX................................. 5
fifo_3_7 .X.XXXX................................. 5
fifo_2_7 .X.XXXX................................. 5
fifo_1_7 .X.XXXX................................. 5
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB7 ***********************************
Number of function block inputs used/remaining: 7/33
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 1/7
Number of PLA product terms used/remaining: 20/28
Number of function block global clocks used/remaining: 1/1
Signal Total Loc Pin Pin Pin GCK
Name Pt No. Type Use
fifo_3_8 3 FB7_1 (b) (b) clk
(unused) 0 FB7_2 37 I/O
(unused) 0 FB7_3 36 I/O
(unused) 0 FB7_4 35 I/O
(unused) 0 FB7_5 33 I/O
(unused) 0 FB7_6 32 I/O
fifo_7_2 3 FB7_7 31 I/O (b) clk
fifo_7_5 3 FB7_8 (b) (b) clk
fifo_6_5 3 FB7_9 (b) (b) clk
fifo_5_5 3 FB7_10 (b) (b) clk
fifo_7_8 3 FB7_11 30 I/O (b) clk
fifo_6_8 3 FB7_12 29 I/O (b) clk
fifo_5_8 3 FB7_13 28 I/O (b) clk
fifo_4_8 3 FB7_14 27 I/O (b) clk
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