jsq24_b.tan.qmsg

用verilog实现的记时器程序,在Quartus II上编译通过并成功运行

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register CLK_1HZ:inst\|q_temp\[9\] register CLK_1HZ:inst\|cout 172.12 MHz 5.81 ns Internal " "Info: Clock \"CLK\" has Internal fmax of 172.12 MHz between source register \"CLK_1HZ:inst\|q_temp\[9\]\" and destination register \"CLK_1HZ:inst\|cout\" (period= 5.81 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.595 ns + Longest register register " "Info: + Longest register to register delay is 5.595 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns CLK_1HZ:inst\|q_temp\[9\] 1 REG LCFF_X56_Y11_N5 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X56_Y11_N5; Fanout = 3; REG Node = 'CLK_1HZ:inst\|q_temp\[9\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK_1HZ:inst|q_temp[9] } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.007 ns) + CELL(0.150 ns) 1.157 ns CLK_1HZ:inst\|LessThan0~400 2 COMB LCCOMB_X54_Y12_N4 1 " "Info: 2: + IC(1.007 ns) + CELL(0.150 ns) = 1.157 ns; Loc. = LCCOMB_X54_Y12_N4; Fanout = 1; COMB Node = 'CLK_1HZ:inst\|LessThan0~400'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.157 ns" { CLK_1HZ:inst|q_temp[9] CLK_1HZ:inst|LessThan0~400 } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.725 ns) + CELL(0.150 ns) 2.032 ns CLK_1HZ:inst\|LessThan0~401 3 COMB LCCOMB_X55_Y11_N2 1 " "Info: 3: + IC(0.725 ns) + CELL(0.150 ns) = 2.032 ns; Loc. = LCCOMB_X55_Y11_N2; Fanout = 1; COMB Node = 'CLK_1HZ:inst\|LessThan0~401'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.875 ns" { CLK_1HZ:inst|LessThan0~400 CLK_1HZ:inst|LessThan0~401 } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.244 ns) + CELL(0.149 ns) 2.425 ns CLK_1HZ:inst\|LessThan0~404 4 COMB LCCOMB_X55_Y11_N30 27 " "Info: 4: + IC(0.244 ns) + CELL(0.149 ns) = 2.425 ns; Loc. = LCCOMB_X55_Y11_N30; Fanout = 27; COMB Node = 'CLK_1HZ:inst\|LessThan0~404'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.393 ns" { CLK_1HZ:inst|LessThan0~401 CLK_1HZ:inst|LessThan0~404 } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.549 ns) + CELL(0.271 ns) 3.245 ns CLK_1HZ:inst\|Add0~2369 5 COMB LCCOMB_X56_Y11_N12 2 " "Info: 5: + IC(0.549 ns) + CELL(0.271 ns) = 3.245 ns; Loc. = LCCOMB_X56_Y11_N12; Fanout = 2; COMB Node = 'CLK_1HZ:inst\|Add0~2369'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.820 ns" { CLK_1HZ:inst|LessThan0~404 CLK_1HZ:inst|Add0~2369 } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.662 ns) + CELL(0.398 ns) 4.305 ns CLK_1HZ:inst\|Equal0~338 6 COMB LCCOMB_X55_Y11_N20 1 " "Info: 6: + IC(0.662 ns) + CELL(0.398 ns) = 4.305 ns; Loc. = LCCOMB_X55_Y11_N20; Fanout = 1; COMB Node = 'CLK_1HZ:inst\|Equal0~338'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.060 ns" { CLK_1HZ:inst|Add0~2369 CLK_1HZ:inst|Equal0~338 } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.255 ns) + CELL(0.275 ns) 4.835 ns CLK_1HZ:inst\|Equal0~339 7 COMB LCCOMB_X55_Y11_N24 1 " "Info: 7: + IC(0.255 ns) + CELL(0.275 ns) = 4.835 ns; Loc. = LCCOMB_X55_Y11_N24; Fanout = 1; COMB Node = 'CLK_1HZ:inst\|Equal0~339'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.530 ns" { CLK_1HZ:inst|Equal0~338 CLK_1HZ:inst|Equal0~339 } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.266 ns) + CELL(0.410 ns) 5.511 ns CLK_1HZ:inst\|Equal0~345 8 COMB LCCOMB_X55_Y11_N22 1 " "Info: 8: + IC(0.266 ns) + CELL(0.410 ns) = 5.511 ns; Loc. = LCCOMB_X55_Y11_N22; Fanout = 1; COMB Node = 'CLK_1HZ:inst\|Equal0~345'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.676 ns" { CLK_1HZ:inst|Equal0~339 CLK_1HZ:inst|Equal0~345 } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 5.595 ns CLK_1HZ:inst\|cout 9 REG LCFF_X55_Y11_N23 1 " "Info: 9: + IC(0.000 ns) + CELL(0.084 ns) = 5.595 ns; Loc. = LCFF_X55_Y11_N23; Fanout = 1; REG Node = 'CLK_1HZ:inst\|cout'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.084 ns" { CLK_1HZ:inst|Equal0~345 CLK_1HZ:inst|cout } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.887 ns ( 33.73 % ) " "Info: Total cell delay = 1.887 ns ( 33.73 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.708 ns ( 66.27 % ) " "Info: Total interconnect delay = 3.708 ns ( 66.27 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.595 ns" { CLK_1HZ:inst|q_temp[9] CLK_1HZ:inst|LessThan0~400 CLK_1HZ:inst|LessThan0~401 CLK_1HZ:inst|LessThan0~404 CLK_1HZ:inst|Add0~2369 CLK_1HZ:inst|Equal0~338 CLK_1HZ:inst|Equal0~339 CLK_1HZ:inst|Equal0~345 CLK_1HZ:inst|cout } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "5.595 ns" { CLK_1HZ:inst|q_temp[9] CLK_1HZ:inst|LessThan0~400 CLK_1HZ:inst|LessThan0~401 CLK_1HZ:inst|LessThan0~404 CLK_1HZ:inst|Add0~2369 CLK_1HZ:inst|Equal0~338 CLK_1HZ:inst|Equal0~339 CLK_1HZ:inst|Equal0~345 CLK_1HZ:inst|cout } { 0.000ns 1.007ns 0.725ns 0.244ns 0.549ns 0.662ns 0.255ns 0.266ns 0.000ns } { 0.000ns 0.150ns 0.150ns 0.149ns 0.271ns 0.398ns 0.275ns 0.410ns 0.084ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.001 ns - Smallest " "Info: - Smallest clock skew is -0.001 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.656 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK\" to destination register is 2.656 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.999 ns) 0.999 ns CLK 1 CLK PIN_N2 1 " "Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_N2; Fanout = 1; CLK Node = 'CLK'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK } "NODE_NAME" } } { "JSQ24_B.bdf" "" { Schematic "G:/zzs/JSQ24_B.bdf" { { 56 -112 56 72 "CLK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.118 ns) + CELL(0.000 ns) 1.117 ns CLK~clkctrl 2 COMB CLKCTRL_G2 27 " "Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G2; Fanout = 27; COMB Node = 'CLK~clkctrl'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.118 ns" { CLK CLK~clkctrl } "NODE_NAME" } } { "JSQ24_B.bdf" "" { Schematic "G:/zzs/JSQ24_B.bdf" { { 56 -112 56 72 "CLK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.002 ns) + CELL(0.537 ns) 2.656 ns CLK_1HZ:inst\|cout 3 REG LCFF_X55_Y11_N23 1 " "Info: 3: + IC(1.002 ns) + CELL(0.537 ns) = 2.656 ns; Loc. = LCFF_X55_Y11_N23; Fanout = 1; REG Node = 'CLK_1HZ:inst\|cout'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.539 ns" { CLK~clkctrl CLK_1HZ:inst|cout } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.536 ns ( 57.83 % ) " "Info: Total cell delay = 1.536 ns ( 57.83 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.120 ns ( 42.17 % ) " "Info: Total interconnect delay = 1.120 ns ( 42.17 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.656 ns" { CLK CLK~clkctrl CLK_1HZ:inst|cout } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.656 ns" { CLK CLK~combout CLK~clkctrl CLK_1HZ:inst|cout } { 0.000ns 0.000ns 0.118ns 1.002ns } { 0.000ns 0.999ns 0.000ns 0.537ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 2.657 ns - Longest register " "Info: - Longest clock path from clock \"CLK\" to source register is 2.657 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.999 ns) 0.999 ns CLK 1 CLK PIN_N2 1 " "Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_N2; Fanout = 1; CLK Node = 'CLK'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK } "NODE_NAME" } } { "JSQ24_B.bdf" "" { Schematic "G:/zzs/JSQ24_B.bdf" { { 56 -112 56 72 "CLK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.118 ns) + CELL(0.000 ns) 1.117 ns CLK~clkctrl 2 COMB CLKCTRL_G2 27 " "Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G2; Fanout = 27; COMB Node = 'CLK~clkctrl'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.118 ns" { CLK CLK~clkctrl } "NODE_NAME" } } { "JSQ24_B.bdf" "" { Schematic "G:/zzs/JSQ24_B.bdf" { { 56 -112 56 72 "CLK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.003 ns) + CELL(0.537 ns) 2.657 ns CLK_1HZ:inst\|q_temp\[9\] 3 REG LCFF_X56_Y11_N5 3 " "Info: 3: + IC(1.003 ns) + CELL(0.537 ns) = 2.657 ns; Loc. = LCFF_X56_Y11_N5; Fanout = 3; REG Node = 'CLK_1HZ:inst\|q_temp\[9\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.540 ns" { CLK~clkctrl CLK_1HZ:inst|q_temp[9] } "NODE_NAME" } } { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.536 ns ( 57.81 % ) " "Info: Total cell delay = 1.536 ns ( 57.81 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.121 ns ( 42.19 % ) " "Info: Total interconnect delay = 1.121 ns ( 42.19 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.657 ns" { CLK CLK~clkctrl CLK_1HZ:inst|q_temp[9] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.657 ns" { CLK CLK~combout CLK~clkctrl CLK_1HZ:inst|q_temp[9] } { 0.000ns 0.000ns 0.118ns 1.003ns } { 0.000ns 0.999ns 0.000ns 0.537ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.656 ns" { CLK CLK~clkctrl CLK_1HZ:inst|cout } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.656 ns" { CLK CLK~combout CLK~clkctrl CLK_1HZ:inst|cout } { 0.000ns 0.000ns 0.118ns 1.002ns } { 0.000ns 0.999ns 0.000ns 0.537ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.657 ns" { CLK CLK~clkctrl CLK_1HZ:inst|q_temp[9] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.657 ns" { CLK CLK~combout CLK~clkctrl CLK_1HZ:inst|q_temp[9] } { 0.000ns 0.000ns 0.118ns 1.003ns } { 0.000ns 0.999ns 0.000ns 0.537ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.250 ns + " "Info: + Micro clock to output delay of source is 0.250 ns" {  } { { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 12 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.036 ns + " "Info: + Micro setup delay of destination is -0.036 ns" {  } { { "CLK_1HZ.v" "" { Text "G:/zzs/CLK_1HZ.v" 3 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.595 ns" { CLK_1HZ:inst|q_temp[9] CLK_1HZ:inst|LessThan0~400 CLK_1HZ:inst|LessThan0~401 CLK_1HZ:inst|LessThan0~404 CLK_1HZ:inst|Add0~2369 CLK_1HZ:inst|Equal0~338 CLK_1HZ:inst|Equal0~339 CLK_1HZ:inst|Equal0~345 CLK_1HZ:inst|cout } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "5.595 ns" { CLK_1HZ:inst|q_temp[9] CLK_1HZ:inst|LessThan0~400 CLK_1HZ:inst|LessThan0~401 CLK_1HZ:inst|LessThan0~404 CLK_1HZ:inst|Add0~2369 CLK_1HZ:inst|Equal0~338 CLK_1HZ:inst|Equal0~339 CLK_1HZ:inst|Equal0~345 CLK_1HZ:inst|cout } { 0.000ns 1.007ns 0.725ns 0.244ns 0.549ns 0.662ns 0.255ns 0.266ns 0.000ns } { 0.000ns 0.150ns 0.150ns 0.149ns 0.271ns 0.398ns 0.275ns 0.410ns 0.084ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.656 ns" { CLK CLK~clkctrl CLK_1HZ:inst|cout } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.656 ns" { CLK CLK~combout CLK~clkctrl CLK_1HZ:inst|cout } { 0.000ns 0.000ns 0.118ns 1.002ns } { 0.000ns 0.999ns 0.000ns 0.537ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.657 ns" { CLK CLK~clkctrl CLK_1HZ:inst|q_temp[9] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "2.657 ns" { CLK CLK~combout CLK~clkctrl CLK_1HZ:inst|q_temp[9] } { 0.000ns 0.000ns 0.118ns 1.003ns } { 0.000ns 0.999ns 0.000ns 0.537ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "JF register CNT24:inst3\|q_temp\[0\] register CNT24:inst3\|q_temp\[4\] 367.65 MHz 2.72 ns Internal " "Info: Clock \"JF\" has Internal fmax of 367.65 MHz between source register \"CNT24:inst3\|q_temp\[0\]\" and destination register \"CNT24:inst3\|q_temp\[4\]\" (period= 2.72 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.955 ns + Longest register register " "Info: + Longest register to register delay is 1.955 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns CNT24:inst3\|q_temp\[0\] 1 REG LCFF_X6_Y18_N1 10 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X6_Y18_N1; Fanout = 10; REG Node = 'CNT24:inst3\|q_temp\[0\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CNT24:inst3|q_temp[0] } "NODE_NAME" } } { "CNT24.v" "" { Text "G:/zzs/CNT24.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.315 ns) + CELL(0.393 ns) 0.708 ns CNT24:inst3\|Add0~97 2 COMB LCCOMB_X6_Y18_N0 2 " "Info: 2: + IC(0.315 ns) + CELL(0.393 ns) = 0.708 ns; Loc. = LCCOMB_X6_Y18_N0; Fanout = 2; COMB Node = 'CNT24:inst3\|Add0~97'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.708 ns" { CNT24:inst3|q_temp[0] CNT24:inst3|Add0~97 } "NODE_NAME" } } { "CNT24.v" "" { Text "G:/zzs/CNT24.v" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 0.779 ns CNT24:inst3\|Add0~99 3 COMB LCCOMB_X6_Y18_N2 2 " "Info: 3: + IC(0.000 ns) + CELL(0.071 ns) = 0.779 ns; Loc. = LCCOMB_X6_Y18_N2; Fanout = 2; COMB Node = 'CNT24:inst3\|Add0~99'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.071 ns" { CNT24:inst3|Add0~97 CNT24:inst3|Add0~99 } "NODE_NAME" } } { "CNT24.v" "" { Text "G:/zzs/CNT24.v" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 0.850 ns CNT24:inst3\|Add0~101 4 COMB LCCOMB_X6_Y18_N4 2 " "Info: 4: + IC(0.000 ns) + CELL(0.071 ns) = 0.850 ns; Loc. = LCCOMB_X6_Y18_N4; Fanout = 2; COMB Node = 'CNT24:inst3\|Add0~101'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.071 ns" { CNT24:inst3|Add0~99 CNT24:inst3|Add0~101 } "NODE_NAME" } } { "CNT24.v" "" { Text "G:/zzs/CNT24.v" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 0.921 ns CNT24:inst3\|Add0~103 5 COMB LCCOMB_X6_Y18_N6 2 " "Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 0.921 ns; Loc. = LCCOMB_X6_Y18_N6; Fanout = 2; COMB Node = 'CNT24:inst3\|Add0~103'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.071 ns" { CNT24:inst3|Add0~101 CNT24:inst3|Add0~103 } "NODE_NAME" } } { "CNT24.v" "" { Text "G:/zzs/CNT24.v" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 1.331 ns CNT24:inst3\|Add0~104 6 COMB LCCOMB_X6_Y18_N8 1 " "Info: 6: + IC(0.000 ns) + CELL(0.410 ns) = 1.331 ns; Loc. = LCCOMB_X6_Y18_N8; Fanout = 1; COMB Node = 'CNT24:inst3\|Add0~104'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.410 ns" { CNT24:inst3|Add0~103 CNT24:inst3|Add0~104 } "NODE_NAME" } } { "CNT24.v" "" { Text "G:/zzs/CNT24.v" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.265 ns) + CELL(0.275 ns) 1.871 ns CNT24:inst3\|q_temp~110 7 COMB LCCOMB_X6_Y18_N28 1 " "Info: 7: + IC(0.265 ns) + CELL(0.275 ns) = 1.871 ns; Loc. = LCCOMB_X6_Y18_N28; Fanout = 1; COMB Node = 'CNT24:inst3\|q_temp~110'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.540 ns" { CNT24:inst3|Add0~104 CNT24:inst3|q_temp~110 } "NODE_NAME" } } { "CNT24.v" "" { Text "G:/zzs/CNT24.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 1.955 ns CNT24:inst3\|q_temp\[4\] 8 REG LCFF_X6_Y18_N29 11 " "Info: 8: + IC(0.000 ns) + CELL(0.084 ns) = 1.955 ns; Loc. = LCFF_X6_Y18_N29; Fanout = 11; REG Node = 'CNT24:inst3\|q_temp\[4\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.084 ns" { CNT24:inst3|q_temp~110 CNT24:inst3|q_temp[4] } "NODE_NAME" } } { "CNT24.v" "" { Text "G:/zzs/CNT24.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.375 ns ( 70.33 % ) " "Info: Total cell delay = 1.375 ns ( 70.33 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.580 ns ( 29.67 % ) " "Info: Total interconnect delay = 0.580 ns ( 29.67 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.955 ns" { CNT24:inst3|q_temp[0] CNT24:inst3|Add0~97 CNT24:inst3|Add0~99 CNT24:inst3|Add0~101 CNT24:inst3|Add0~103 CNT24:inst3|Add0~104 CNT24:inst3|q_temp~110 CNT24:inst3|q_temp[4] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.955 ns" { CNT24:inst3|q_temp[0] CNT24:inst3|Add0~97 CNT24:inst3|Add0~99 CNT24:inst3|Add0~101 CNT24:inst3|Add0~103 CNT24:inst3|Add0~104 CNT24:inst3|q_temp~110 CNT24:inst3|q_temp[4] } { 0.000ns 0.315ns 0.000ns 0.000ns 0.000ns 0.000ns 0.265ns 0.000ns } { 0.000ns 0.393ns 0.071ns 0.071ns 0.071ns 0.410ns 0.275ns 0.084ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.551 ns - Smallest " "Info: - Smallest clock skew is -0.551 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "JF destination 10.822 ns + Shortest register " "Info: + Shortest clock path from clock \"JF\" to destination register is 10.822 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.842 ns) 0.842 ns JF 1 CLK PIN_N23 1 " "Info: 1: + IC(0.000 ns) + CELL(0.842 ns) = 0.842 ns; Loc. = PIN_N23; Fanout = 1; CLK Node = 'JF'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { JF } "NODE_NAME" } } { "JSQ24_B.bdf" "" { Schematic "G:/zzs/JSQ24_B.bdf" { { 376 -128 40 392 "JF" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.472 ns) + CELL(0.150 ns) 2.464 ns CNT60:inst2\|always0~0 2 COMB LCCOMB_X42_Y16_N22 1 " "Info: 2: + IC(1.472 ns) + CELL(0.150 ns) = 2.464 ns; Loc. = LCCOMB_X42_Y16_N22; Fanout = 1; COMB Node = 'CNT60:inst2\|always0~0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.622 ns" { JF CNT60:inst2|always0~0 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.905 ns) + CELL(0.000 ns) 4.369 ns CNT60:inst2\|always0~0clkctrl 3 COMB CLKCTRL_G12 8 " "Info: 3: + IC(1.905 ns) + CELL(0.000 ns) = 4.369 ns; Loc. = CLKCTRL_G12; Fanout = 8; COMB Node = 'CNT60:i