qiangdaqi.tan.qmsg

用verilog实现的记时器程序,在Quartus II上编译通过并成功运行

{ "Info" "ITDB_TH_RESULT" "Q\[1\] K S1 -4.828 ns register " "Info: th for register \"Q\[1\]\" (data pin = \"K\", clock pin = \"S1\") is -4.828 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "S1 destination 3.570 ns + Longest register " "Info: + Longest clock path from clock \"S1\" to destination register is 3.570 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.842 ns) 0.842 ns S1 1 CLK PIN_N23 1 " "Info: 1: + IC(0.000 ns) + CELL(0.842 ns) = 0.842 ns; Loc. = PIN_N23; Fanout = 1; CLK Node = 'S1'" {  } { { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "" { S1 } "NODE_NAME" } } { "qiangdaqi.v" "" { Text "E:/zzs/aa1/qiangdaqi.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.191 ns) + CELL(0.537 ns) 3.570 ns Q\[1\] 2 REG LCFF_X37_Y7_N9 6 " "Info: 2: + IC(2.191 ns) + CELL(0.537 ns) = 3.570 ns; Loc. = LCFF_X37_Y7_N9; Fanout = 6; REG Node = 'Q\[1\]'" {  } { { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "2.728 ns" { S1 Q[1] } "NODE_NAME" } } { "qiangdaqi.v" "" { Text "E:/zzs/aa1/qiangdaqi.v" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.379 ns ( 38.63 % ) " "Info: Total cell delay = 1.379 ns ( 38.63 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.191 ns ( 61.37 % ) " "Info: Total interconnect delay = 2.191 ns ( 61.37 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "3.570 ns" { S1 Q[1] } "NODE_NAME" } } { "d:/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/bin/Technology_Viewer.qrui" "3.570 ns" { S1 S1~combout Q[1] } { 0.000ns 0.000ns 2.191ns } { 0.000ns 0.842ns 0.537ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TH_DELAY" "0.266 ns + " "Info: + Micro hold delay of destination is 0.266 ns" {  } { { "qiangdaqi.v" "" { Text "E:/zzs/aa1/qiangdaqi.v" 10 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.664 ns - Shortest pin register " "Info: - Shortest pin to register delay is 8.664 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.862 ns) 0.862 ns K 1 PIN PIN_H1 4 " "Info: 1: + IC(0.000 ns) + CELL(0.862 ns) = 0.862 ns; Loc. = PIN_H1; Fanout = 4; PIN Node = 'K'" {  } { { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "" { K } "NODE_NAME" } } { "qiangdaqi.v" "" { Text "E:/zzs/aa1/qiangdaqi.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(6.461 ns) + CELL(0.438 ns) 7.761 ns WideNor0~11 2 COMB LCCOMB_X37_Y7_N14 3 " "Info: 2: + IC(6.461 ns) + CELL(0.438 ns) = 7.761 ns; Loc. = LCCOMB_X37_Y7_N14; Fanout = 3; COMB Node = 'WideNor0~11'" {  } { { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "6.899 ns" { K WideNor0~11 } "NODE_NAME" } } { "qiangdaqi.v" "" { Text "E:/zzs/aa1/qiangdaqi.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.243 ns) + CELL(0.660 ns) 8.664 ns Q\[1\] 3 REG LCFF_X37_Y7_N9 6 " "Info: 3: + IC(0.243 ns) + CELL(0.660 ns) = 8.664 ns; Loc. = LCFF_X37_Y7_N9; Fanout = 6; REG Node = 'Q\[1\]'" {  } { { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "0.903 ns" { WideNor0~11 Q[1] } "NODE_NAME" } } { "qiangdaqi.v" "" { Text "E:/zzs/aa1/qiangdaqi.v" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.960 ns ( 22.62 % ) " "Info: Total cell delay = 1.960 ns ( 22.62 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.704 ns ( 77.38 % ) " "Info: Total interconnect delay = 6.704 ns ( 77.38 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "8.664 ns" { K WideNor0~11 Q[1] } "NODE_NAME" } } { "d:/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/bin/Technology_Viewer.qrui" "8.664 ns" { K K~combout WideNor0~11 Q[1] } { 0.000ns 0.000ns 6.461ns 0.243ns } { 0.000ns 0.862ns 0.438ns 0.660ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0}  } { { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "3.570 ns" { S1 Q[1] } "NODE_NAME" } } { "d:/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/bin/Technology_Viewer.qrui" "3.570 ns" { S1 S1~combout Q[1] } { 0.000ns 0.000ns 2.191ns } { 0.000ns 0.842ns 0.537ns } "" } } { "d:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/bin/TimingClosureFloorplan.fld" "" "8.664 ns" { K WideNor0~11 Q[1] } "NODE_NAME" } } { "d:/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/bin/Technology_Viewer.qrui" "8.664 ns" { K K~combout WideNor0~11 Q[1] } { 0.000ns 0.000ns 6.461ns 0.243ns } { 0.000ns 0.862ns 0.438ns 0.660ns } "" } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "111 " "Info: Allocated 111 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct 18 23:14:17 2007 " "Info: Processing ended: Thu Oct 18 23:14:17 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}