automake.log

xilinx实现4位频率计

ISE Auto-Make Log File
-----------------------

Starting: 'jhdparse @_fosc.jp'


JHDPARSE - VHDL/Verilog Parser.
ISE 4.1i Copyright(c) 1999-2001 Xilinx, Inc.  All rights reserved. 

Scanning    d:/Xilinx_WebPACK/data/simprim.lst
Scanning    d:/Xilinx_WebPACK/verilog/src/iSE/unisim_comp.v
Scanning    fosc.v
Writing fosc.jhd.

JHDPARSE complete -    0 errors,    0 warnings.

Done: completed successfully.