fosc.npl

xilinx实现4位频率计

JDF E
// Created by ISE ver 1.0
PROJECT fosc
DESIGN fosc Normal
DEVKIT XC95108 PC84
DEVFAM xc9500
FLOW XST Verilog
MODULE fosc.v
MODSTYLE fosc Normal

[STRATEGY-LIST]
Normal=True, 1037615673