ripple_counter.v

VerilogHDL_advanced_digital_design_code_Ch6 Verilog HDL 高级数字设计源码ch6

vti_encoding:SR|utf8-nl
vti_timelastmodified:TR|12 Jun 2002 17:53:48 -0000
vti_extenderversion:SR|5.0.2.4330
vti_lineageid:SR|{D4332752-F3AC-4A44-9806-CDF5FCEE85EA}
vti_cacheddtm:TX|12 Jun 2002 17:53:48 -0000
vti_filesize:IR|832
vti_backlinkinfo:VX|