shift_mult.fit.qmsg

基于ＦＰＧＡ实现移位乘法功能

{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "7.114 ns register register " "Info: Estimated most critical path is register to register delay of 7.114 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns i\[8\] 1 REG LAB_X17_Y4 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X17_Y4; Fanout = 4; REG Node = 'i\[8\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { i[8] } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.309 ns) + CELL(0.114 ns) 1.423 ns Equal0~318 2 COMB LAB_X17_Y5 1 " "Info: 2: + IC(1.309 ns) + CELL(0.114 ns) = 1.423 ns; Loc. = LAB_X17_Y5; Fanout = 1; COMB Node = 'Equal0~318'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.423 ns" { i[8] Equal0~318 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.787 ns) + CELL(0.590 ns) 2.800 ns Equal0~322 3 COMB LAB_X17_Y2 21 " "Info: 3: + IC(0.787 ns) + CELL(0.590 ns) = 2.800 ns; Loc. = LAB_X17_Y2; Fanout = 21; COMB Node = 'Equal0~322'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.377 ns" { Equal0~318 Equal0~322 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.212 ns) + CELL(0.442 ns) 3.454 ns LessThan0~288 4 COMB LAB_X17_Y2 4 " "Info: 4: + IC(0.212 ns) + CELL(0.442 ns) = 3.454 ns; Loc. = LAB_X17_Y2; Fanout = 4; COMB Node = 'LessThan0~288'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.654 ns" { Equal0~322 LessThan0~288 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.108 ns) + CELL(0.838 ns) 5.400 ns i\[0\]~516 5 COMB LAB_X17_Y5 6 " "Info: 5: + IC(1.108 ns) + CELL(0.838 ns) = 5.400 ns; Loc. = LAB_X17_Y5; Fanout = 6; COMB Node = 'i\[0\]~516'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.946 ns" { LessThan0~288 i[0]~516 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 5.536 ns i\[5\]~490 6 COMB LAB_X17_Y5 6 " "Info: 6: + IC(0.000 ns) + CELL(0.136 ns) = 5.536 ns; Loc. = LAB_X17_Y5; Fanout = 6; COMB Node = 'i\[5\]~490'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.136 ns" { i[0]~516 i[5]~490 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 5.672 ns i\[10\]~495 7 COMB LAB_X17_Y4 6 " "Info: 7: + IC(0.000 ns) + CELL(0.136 ns) = 5.672 ns; Loc. = LAB_X17_Y4; Fanout = 6; COMB Node = 'i\[10\]~495'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.136 ns" { i[5]~490 i[10]~495 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 5.808 ns i\[15\]~500 8 COMB LAB_X17_Y4 6 " "Info: 8: + IC(0.000 ns) + CELL(0.136 ns) = 5.808 ns; Loc. = LAB_X17_Y4; Fanout = 6; COMB Node = 'i\[15\]~500'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.136 ns" { i[10]~495 i[15]~500 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 5.944 ns i\[20\]~505 9 COMB LAB_X17_Y3 6 " "Info: 9: + IC(0.000 ns) + CELL(0.136 ns) = 5.944 ns; Loc. = LAB_X17_Y3; Fanout = 6; COMB Node = 'i\[20\]~505'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.136 ns" { i[15]~500 i[20]~505 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 6.080 ns i\[25\]~510 10 COMB LAB_X17_Y3 6 " "Info: 10: + IC(0.000 ns) + CELL(0.136 ns) = 6.080 ns; Loc. = LAB_X17_Y3; Fanout = 6; COMB Node = 'i\[25\]~510'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.136 ns" { i[20]~505 i[25]~510 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 6.216 ns i\[30\]~515 11 COMB LAB_X17_Y2 1 " "Info: 11: + IC(0.000 ns) + CELL(0.136 ns) = 6.216 ns; Loc. = LAB_X17_Y2; Fanout = 1; COMB Node = 'i\[30\]~515'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.136 ns" { i[25]~510 i[30]~515 } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.898 ns) 7.114 ns i\[31\] 12 REG LAB_X17_Y2 3 " "Info: 12: + IC(0.000 ns) + CELL(0.898 ns) = 7.114 ns; Loc. = LAB_X17_Y2; Fanout = 3; REG Node = 'i\[31\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.898 ns" { i[30]~515 i[31] } "NODE_NAME" } } { "shift_mult.v" "" { Text "E:/EDAFIle/shift_mult_16/shift_mult.v" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.698 ns ( 51.98 % ) " "Info: Total cell delay = 3.698 ns ( 51.98 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.416 ns ( 48.02 % ) " "Info: Total interconnect delay = 3.416 ns ( 48.02 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "7.114 ns" { i[8] Equal0~318 Equal0~322 LessThan0~288 i[0]~516 i[5]~490 i[10]~495 i[15]~500 i[20]~505 i[25]~510 i[30]~515 i[31] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 2 " "Info: Average interconnect usage is 1% of the available device resources. Peak interconnect usage is 2%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "x14_y0 x27_y14 " "Info: The peak interconnect region extends from location x14_y0 to location x27_y14" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Info: Fitter routing operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Jul 19 02:02:39 2007 " "Info: Processing ended: Thu Jul 19 02:02:39 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:19 " "Info: Elapsed time: 00:00:19" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "E:/EDAFIle/shift_mult_16/shift_mult.fit.smsg " "Info: Generated suppressed messages file E:/EDAFIle/shift_mult_16/shift_mult.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}