sintab_altera.vo

来自「在利用Verilog在FPGA平台上输出正弦波」· VO 代码 · 共 1,615 行 · 第 1/5 页
1,615 行
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(sin_output[6]));
// synopsys translate_off
defparam \sin_output[6]~I .operation_mode = "output";
defparam \sin_output[6]~I .input_register_mode = "none";
defparam \sin_output[6]~I .output_register_mode = "none";
defparam \sin_output[6]~I .oe_register_mode = "none";
defparam \sin_output[6]~I .input_async_reset = "none";
defparam \sin_output[6]~I .output_async_reset = "none";
defparam \sin_output[6]~I .oe_async_reset = "none";
defparam \sin_output[6]~I .input_sync_reset = "none";
defparam \sin_output[6]~I .output_sync_reset = "none";
defparam \sin_output[6]~I .oe_sync_reset = "none";
defparam \sin_output[6]~I .input_power_up = "low";
defparam \sin_output[6]~I .output_power_up = "low";
defparam \sin_output[6]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_B15
cycloneii_io \sin_output[7]~I (
	.datain(\sintab1|altsyncram_component|auto_generated|q_a[7] ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(sin_output[7]));
// synopsys translate_off
defparam \sin_output[7]~I .operation_mode = "output";
defparam \sin_output[7]~I .input_register_mode = "none";
defparam \sin_output[7]~I .output_register_mode = "none";
defparam \sin_output[7]~I .oe_register_mode = "none";
defparam \sin_output[7]~I .input_async_reset = "none";
defparam \sin_output[7]~I .output_async_reset = "none";
defparam \sin_output[7]~I .oe_async_reset = "none";
defparam \sin_output[7]~I .input_sync_reset = "none";
defparam \sin_output[7]~I .output_sync_reset = "none";
defparam \sin_output[7]~I .oe_sync_reset = "none";
defparam \sin_output[7]~I .input_power_up = "low";
defparam \sin_output[7]~I .output_power_up = "low";
defparam \sin_output[7]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_A16
cycloneii_io \sin_output[8]~I (
	.datain(\sintab1|altsyncram_component|auto_generated|q_a[8] ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(sin_output[8]));
// synopsys translate_off
defparam \sin_output[8]~I .operation_mode = "output";
defparam \sin_output[8]~I .input_register_mode = "none";
defparam \sin_output[8]~I .output_register_mode = "none";
defparam \sin_output[8]~I .oe_register_mode = "none";
defparam \sin_output[8]~I .input_async_reset = "none";
defparam \sin_output[8]~I .output_async_reset = "none";
defparam \sin_output[8]~I .oe_async_reset = "none";
defparam \sin_output[8]~I .input_sync_reset = "none";
defparam \sin_output[8]~I .output_sync_reset = "none";
defparam \sin_output[8]~I .oe_sync_reset = "none";
defparam \sin_output[8]~I .input_power_up = "low";
defparam \sin_output[8]~I .output_power_up = "low";
defparam \sin_output[8]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_D2
cycloneii_io \sin_output[9]~I (
	.datain(\sintab1|altsyncram_component|auto_generated|q_a[9] ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(sin_output[9]));
// synopsys translate_off
defparam \sin_output[9]~I .operation_mode = "output";
defparam \sin_output[9]~I .input_register_mode = "none";
defparam \sin_output[9]~I .output_register_mode = "none";
defparam \sin_output[9]~I .oe_register_mode = "none";
defparam \sin_output[9]~I .input_async_reset = "none";
defparam \sin_output[9]~I .output_async_reset = "none";
defparam \sin_output[9]~I .oe_async_reset = "none";
defparam \sin_output[9]~I .input_sync_reset = "none";
defparam \sin_output[9]~I .output_sync_reset = "none";
defparam \sin_output[9]~I .oe_sync_reset = "none";
defparam \sin_output[9]~I .input_power_up = "low";
defparam \sin_output[9]~I .output_power_up = "low";
defparam \sin_output[9]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_F11
cycloneii_io \sin_output[10]~I (
	.datain(\sintab1|altsyncram_component|auto_generated|q_a[10] ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(sin_output[10]));
// synopsys translate_off
defparam \sin_output[10]~I .operation_mode = "output";
defparam \sin_output[10]~I .input_register_mode = "none";
defparam \sin_output[10]~I .output_register_mode = "none";
defparam \sin_output[10]~I .oe_register_mode = "none";
defparam \sin_output[10]~I .input_async_reset = "none";
defparam \sin_output[10]~I .output_async_reset = "none";
defparam \sin_output[10]~I .oe_async_reset = "none";
defparam \sin_output[10]~I .input_sync_reset = "none";
defparam \sin_output[10]~I .output_sync_reset = "none";
defparam \sin_output[10]~I .oe_sync_reset = "none";
defparam \sin_output[10]~I .input_power_up = "low";
defparam \sin_output[10]~I .output_power_up = "low";
defparam \sin_output[10]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_E11
cycloneii_io \sin_output[11]~I (
	.datain(\sintab1|altsyncram_component|auto_generated|q_a[11] ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(sin_output[11]));
// synopsys translate_off
defparam \sin_output[11]~I .operation_mode = "output";
defparam \sin_output[11]~I .input_register_mode = "none";
defparam \sin_output[11]~I .output_register_mode = "none";
defparam \sin_output[11]~I .oe_register_mode = "none";
defparam \sin_output[11]~I .input_async_reset = "none";
defparam \sin_output[11]~I .output_async_reset = "none";
defparam \sin_output[11]~I .oe_async_reset = "none";
defparam \sin_output[11]~I .input_sync_reset = "none";
defparam \sin_output[11]~I .output_sync_reset = "none";
defparam \sin_output[11]~I .oe_sync_reset = "none";
defparam \sin_output[11]~I .input_power_up = "low";
defparam \sin_output[11]~I .output_power_up = "low";
defparam \sin_output[11]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_E21
cycloneii_io \sin_output[12]~I (
	.datain(\sintab1|altsyncram_component|auto_generated|q_a[12] ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(sin_output[12]));
// synopsys translate_off
defparam \sin_output[12]~I .operation_mode = "output";
defparam \sin_output[12]~I .input_register_mode = "none";
defparam \sin_output[12]~I .output_register_mode = "none";
defparam \sin_output[12]~I .oe_register_mode = "none";
defparam \sin_output[12]~I .input_async_reset = "none";
defparam \sin_output[12]~I .output_async_reset = "none";
defparam \sin_output[12]~I .oe_async_reset = "none";
defparam \sin_output[12]~I .input_sync_reset = "none";
defparam \sin_output[12]~I .output_sync_reset = "none";
defparam \sin_output[12]~I .oe_sync_reset = "none";
defparam \sin_output[12]~I .input_power_up = "low";
defparam \sin_output[12]~I .output_power_up = "low";
defparam \sin_output[12]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_G22
cycloneii_io \sin_output[13]~I (
	.datain(\sintab1|altsyncram_component|auto_generated|q_a[13] ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(sin_output[13]));
// synopsys translate_off
defparam \sin_output[13]~I .operation_mode = "output";
defparam \sin_output[13]~I .input_register_mode = "none";
defparam \sin_output[13]~I .output_register_mode = "none";
defparam \sin_output[13]~I .oe_register_mode = "none";
defparam \sin_output[13]~I .input_async_reset = "none";
defparam \sin_output[13]~I .output_async_reset = "none";
defparam \sin_output[13]~I .oe_async_reset = "none";
defparam \sin_output[13]~I .input_sync_reset = "none";
defparam \sin_output[13]~I .output_sync_reset = "none";
defparam \sin_output[13]~I .oe_sync_reset = "none";
defparam \sin_output[13]~I .input_power_up = "low";
defparam \sin_output[13]~I .output_power_up = "low";
defparam \sin_output[13]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_A13
cycloneii_io \counter[0]~I (
	.datain(\counter[0]~reg0 ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(counter[0]));
// synopsys translate_off
defparam \counter[0]~I .operation_mode = "output";
defparam \counter[0]~I .input_register_mode = "none";
defparam \counter[0]~I .output_register_mode = "none";
defparam \counter[0]~I .oe_register_mode = "none";
defparam \counter[0]~I .input_async_reset = "none";
defparam \counter[0]~I .output_async_reset = "none";
defparam \counter[0]~I .oe_async_reset = "none";
defparam \counter[0]~I .input_sync_reset = "none";
defparam \counter[0]~I .output_sync_reset = "none";
defparam \counter[0]~I .oe_sync_reset = "none";
defparam \counter[0]~I .input_power_up = "low";
defparam \counter[0]~I .output_power_up = "low";
defparam \counter[0]~I .oe_power_up = "low";
// synopsys translate_on

// atom is at PIN_B11
cycloneii_io \counter[1]~I (
	.datain(\counter[1]~reg0 ),
sintab_altera.vo - 源码说明

本页面展示了「在利用Verilog在FPGA平台上输出正弦波」中的 sintab_altera.vo 源码文件，采用 VO 编程语言编写，共 1,615 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。
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