qiangdaqi.fnsim.qmsg

用verilog hdl硬件描述语言实现多人抢答器功能

{ "Info" "ISGN_MEGAFN_DESCENDANT" "score:inst\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs score:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"score:inst\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"score:inst\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 53 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "score:inst\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"score:inst\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 4 " "Info: Parameter \"LPM_WIDTH\" = \"4\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 53 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "score:inst\|lpm_add_sub:Add8 " "Info: Elaborated megafunction instantiation \"score:inst\|lpm_add_sub:Add8\"" {  } { { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "score:inst\|lpm_add_sub:Add8\|addcore:adder score:inst\|lpm_add_sub:Add8 " "Info: Elaborated megafunction instantiation \"score:inst\|lpm_add_sub:Add8\|addcore:adder\", which is child of megafunction instantiation \"score:inst\|lpm_add_sub:Add8\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } } { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "score:inst\|lpm_add_sub:Add8 " "Info: Instantiated megafunction \"score:inst\|lpm_add_sub:Add8\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "score:inst\|lpm_add_sub:Add8\|addcore:adder\|a_csnbuffer:oflow_node score:inst\|lpm_add_sub:Add8 " "Info: Elaborated megafunction instantiation \"score:inst\|lpm_add_sub:Add8\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"score:inst\|lpm_add_sub:Add8\"" {  } { { "addcore.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "score:inst\|lpm_add_sub:Add8 " "Info: Instantiated megafunction \"score:inst\|lpm_add_sub:Add8\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "score:inst\|lpm_add_sub:Add8\|addcore:adder\|a_csnbuffer:result_node score:inst\|lpm_add_sub:Add8 " "Info: Elaborated megafunction instantiation \"score:inst\|lpm_add_sub:Add8\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"score:inst\|lpm_add_sub:Add8\"" {  } { { "addcore.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "score:inst\|lpm_add_sub:Add8 " "Info: Instantiated megafunction \"score:inst\|lpm_add_sub:Add8\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "score:inst\|lpm_add_sub:Add8\|altshift:result_ext_latency_ffs score:inst\|lpm_add_sub:Add8 " "Info: Elaborated megafunction instantiation \"score:inst\|lpm_add_sub:Add8\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"score:inst\|lpm_add_sub:Add8\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/lpm_add_sub.tdf" 284 2 0 } } { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "score:inst\|lpm_add_sub:Add8 " "Info: Instantiated megafunction \"score:inst\|lpm_add_sub:Add8\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "score.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/score.v" 110 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "qiangda:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\"" {  } { { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "qiangda:inst2\|lpm_add_sub:Add0\|addcore:adder qiangda:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } } { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "qiangda:inst2\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"qiangda:inst2\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 8 " "Info: Parameter \"LPM_WIDTH\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "qiangda:inst2\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node qiangda:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "qiangda:inst2\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"qiangda:inst2\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 8 " "Info: Parameter \"LPM_WIDTH\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "qiangda:inst2\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node qiangda:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "qiangda:inst2\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"qiangda:inst2\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 8 " "Info: Parameter \"LPM_WIDTH\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "qiangda:inst2\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs qiangda:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"qiangda:inst2\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/program files/altera/quartus 6.0/libraries/megafunctions/lpm_add_sub.tdf" 284 2 0 } } { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "qiangda:inst2\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"qiangda:inst2\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 8 " "Info: Parameter \"LPM_WIDTH\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "qiangda.v" "" { Text "E:/Programs/Verilog/workspace/qiangdaqi(auto)/qiangda.v" 140 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Functional Simulation Netlist Generation 0 s 0 s Quartus II " "Info: Quartus II Functional Simulation Netlist Generation was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Jun 28 00:10:29 2007 " "Info: Processing ended: Thu Jun 28 00:10:29 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}