qiangdaqi.hier_info

用verilog hdl硬件描述语言实现多人抢答器功能

|qiangdaqi
alarm <= qiangda:inst2.alarm
clk1 => qiangda:inst2.clk1
clk1 => score:inst.clk
clk2 => qiangda:inst2.clk2
k1 => qiangda:inst2.k1
k2 => qiangda:inst2.k2
k3 => qiangda:inst2.k3
k4 => qiangda:inst2.k4
reset => qiangda:inst2.reset
reset => score:inst.reset
led1 <= qiangda:inst2.result1
led2 <= qiangda:inst2.result2
led3 <= qiangda:inst2.result3
led4 <= qiangda:inst2.result4
score1[0] <= score:inst.score1[0]
score1[1] <= score:inst.score1[1]
score1[2] <= score:inst.score1[2]
score1[3] <= score:inst.score1[3]
score1[4] <= score:inst.score1[4]
score1[5] <= score:inst.score1[5]
score1[6] <= score:inst.score1[6]
score1[7] <= score:inst.score1[7]
up => score:inst.up
down => score:inst.down
reset1 => score:inst.reset1
score2[0] <= score:inst.score2[0]
score2[1] <= score:inst.score2[1]
score2[2] <= score:inst.score2[2]
score2[3] <= score:inst.score2[3]
score2[4] <= score:inst.score2[4]
score2[5] <= score:inst.score2[5]
score2[6] <= score:inst.score2[6]
score2[7] <= score:inst.score2[7]
score3[0] <= score:inst.score3[0]
score3[1] <= score:inst.score3[1]
score3[2] <= score:inst.score3[2]
score3[3] <= score:inst.score3[3]
score3[4] <= score:inst.score3[4]
score3[5] <= score:inst.score3[5]
score3[6] <= score:inst.score3[6]
score3[7] <= score:inst.score3[7]
score4[0] <= score:inst.score4[0]
score4[1] <= score:inst.score4[1]
score4[2] <= score:inst.score4[2]
score4[3] <= score:inst.score4[3]
score4[4] <= score:inst.score4[4]
score4[5] <= score:inst.score4[5]
score4[6] <= score:inst.score4[6]
score4[7] <= score:inst.score4[7]


|qiangdaqi|qiangda:inst2
clk1 => cnt[6].CLK
clk1 => cnt[5].CLK
clk1 => cnt[4].CLK
clk1 => cnt[3].CLK
clk1 => cnt[2].CLK
clk1 => cnt[1].CLK
clk1 => cnt[0].CLK
clk1 => lock.CLK
clk1 => result1~reg0.CLK
clk1 => result2~reg0.CLK
clk1 => result3~reg0.CLK
clk1 => result4~reg0.CLK
clk1 => alarm_ahead.CLK
clk1 => alarm_delay.CLK
clk1 => delay.CLK
clk1 => flag1.CLK
clk1 => flag2.CLK
clk1 => flag3.CLK
clk1 => cnt[7].CLK
clk2 => alarm~0.IN1
clk2 => clk3.CLK
k1 => always1~0.IN1
k1 => always1~9.IN1
k1 => always1~13.IN1
k1 => always1~4.IN1
k2 => always1~1.IN1
k2 => always1~10.IN1
k2 => always1~15.IN1
k2 => always1~5.IN1
k3 => always1~2.IN1
k3 => always1~11.IN1
k3 => always1~17.IN1
k3 => always1~6.IN1
k4 => always1~3.IN1
k4 => always1~12.IN1
k4 => always1~19.IN1
k4 => always1~7.IN1
reset => cnt[6].ACLR
reset => cnt[5].ACLR
reset => cnt[4].ACLR
reset => cnt[3].ACLR
reset => cnt[2].ACLR
reset => cnt[1].ACLR
reset => cnt[0].ACLR
reset => lock.ACLR
reset => result1~reg0.ACLR
reset => result2~reg0.ACLR
reset => result3~reg0.ACLR
reset => result4~reg0.ACLR
reset => alarm_ahead.ACLR
reset => alarm_delay.ACLR
reset => delay.PRESET
reset => flag1.ACLR
reset => flag2.ACLR
reset => flag3.ACLR
reset => cnt[7].ACLR
alarm <= alarm~2.DB_MAX_OUTPUT_PORT_TYPE
result1 <= result1~reg0.DB_MAX_OUTPUT_PORT_TYPE
result2 <= result2~reg0.DB_MAX_OUTPUT_PORT_TYPE
result3 <= result3~reg0.DB_MAX_OUTPUT_PORT_TYPE
result4 <= result4~reg0.DB_MAX_OUTPUT_PORT_TYPE


|qiangdaqi|score:inst
up => flag~5.OUTPUTSELECT
up => score1~52.OUTPUTSELECT
up => score1~53.OUTPUTSELECT
up => score1~54.OUTPUTSELECT
up => score1~55.OUTPUTSELECT
up => score1~56.OUTPUTSELECT
up => score1~57.OUTPUTSELECT
up => score1~58.OUTPUTSELECT
up => score1~59.OUTPUTSELECT
up => score2~52.OUTPUTSELECT
up => score2~53.OUTPUTSELECT
up => score2~54.OUTPUTSELECT
up => score2~55.OUTPUTSELECT
up => score2~56.OUTPUTSELECT
up => score2~57.OUTPUTSELECT
up => score2~58.OUTPUTSELECT
up => score2~59.OUTPUTSELECT
up => score3~52.OUTPUTSELECT
up => score3~53.OUTPUTSELECT
up => score3~54.OUTPUTSELECT
up => score3~55.OUTPUTSELECT
up => score3~56.OUTPUTSELECT
up => score3~57.OUTPUTSELECT
up => score3~58.OUTPUTSELECT
up => score3~59.OUTPUTSELECT
up => score4~52.OUTPUTSELECT
up => score4~53.OUTPUTSELECT
up => score4~54.OUTPUTSELECT
up => score4~55.OUTPUTSELECT
up => score4~56.OUTPUTSELECT
up => score4~57.OUTPUTSELECT
up => score4~58.OUTPUTSELECT
up => score4~59.OUTPUTSELECT
down => flag~4.OUTPUTSELECT
down => score1~44.OUTPUTSELECT
down => score1~45.OUTPUTSELECT
down => score1~46.OUTPUTSELECT
down => score1~47.OUTPUTSELECT
down => score1~48.OUTPUTSELECT
down => score1~49.OUTPUTSELECT
down => score1~50.OUTPUTSELECT
down => score1~51.OUTPUTSELECT
down => score2~44.OUTPUTSELECT
down => score2~45.OUTPUTSELECT
down => score2~46.OUTPUTSELECT
down => score2~47.OUTPUTSELECT
down => score2~48.OUTPUTSELECT
down => score2~49.OUTPUTSELECT
down => score2~50.OUTPUTSELECT
down => score2~51.OUTPUTSELECT
down => score3~44.OUTPUTSELECT
down => score3~45.OUTPUTSELECT
down => score3~46.OUTPUTSELECT
down => score3~47.OUTPUTSELECT
down => score3~48.OUTPUTSELECT
down => score3~49.OUTPUTSELECT
down => score3~50.OUTPUTSELECT
down => score3~51.OUTPUTSELECT
down => score4~44.OUTPUTSELECT
down => score4~45.OUTPUTSELECT
down => score4~46.OUTPUTSELECT
down => score4~47.OUTPUTSELECT
down => score4~48.OUTPUTSELECT
down => score4~49.OUTPUTSELECT
down => score4~50.OUTPUTSELECT
down => score4~51.OUTPUTSELECT
clk => score1[7]~reg0.CLK
clk => score1[6]~reg0.CLK
clk => score1[5]~reg0.CLK
clk => score1[4]~reg0.CLK
clk => score1[3]~reg0.CLK
clk => score1[2]~reg0.CLK
clk => score1[1]~reg0.CLK
clk => score1[0]~reg0.CLK
clk => score2[7]~reg0.CLK
clk => score2[6]~reg0.CLK
clk => score2[5]~reg0.CLK
clk => score2[4]~reg0.CLK
clk => score2[3]~reg0.CLK
clk => score2[2]~reg0.CLK
clk => score2[1]~reg0.CLK
clk => score2[0]~reg0.CLK
clk => score3[7]~reg0.CLK
clk => score3[6]~reg0.CLK
clk => score3[5]~reg0.CLK
clk => score3[4]~reg0.CLK
clk => score3[3]~reg0.CLK
clk => score3[2]~reg0.CLK
clk => score3[1]~reg0.CLK
clk => score3[0]~reg0.CLK
clk => score4[7]~reg0.CLK
clk => score4[6]~reg0.CLK
clk => score4[5]~reg0.CLK
clk => score4[4]~reg0.CLK
clk => score4[3]~reg0.CLK
clk => score4[2]~reg0.CLK
clk => score4[1]~reg0.CLK
clk => score4[0]~reg0.CLK
clk => flag.CLK
reset => flag~6.IN1
reset => score1[7]~reg0.ENA
reset => score1[6]~reg0.ENA
reset => score1[5]~reg0.ENA
reset => score1[3]~reg0.ENA
reset => score1[2]~reg0.ENA
reset => score1[1]~reg0.ENA
reset => score1[0]~reg0.ENA
reset => score2[7]~reg0.ENA
reset => score2[6]~reg0.ENA
reset => score2[5]~reg0.ENA
reset => score2[3]~reg0.ENA
reset => score2[2]~reg0.ENA
reset => score2[1]~reg0.ENA
reset => score2[0]~reg0.ENA
reset => score3[7]~reg0.ENA
reset => score3[6]~reg0.ENA
reset => score3[5]~reg0.ENA
reset => score3[3]~reg0.ENA
reset => score3[2]~reg0.ENA
reset => score3[1]~reg0.ENA
reset => score3[0]~reg0.ENA
reset => score4[7]~reg0.ENA
reset => score4[6]~reg0.ENA
reset => score4[5]~reg0.ENA
reset => score4[3]~reg0.ENA
reset => score4[2]~reg0.ENA
reset => score4[1]~reg0.ENA
reset => score4[0]~reg0.ENA
reset => score1[4]~reg0.ENA
reset => score2[4]~reg0.ENA
reset => score3[4]~reg0.ENA
reset => score4[4]~reg0.ENA
reset1 => score1[6]~reg0.ACLR
reset1 => score1[5]~reg0.ACLR
reset1 => score1[4]~reg0.PRESET
reset1 => score1[3]~reg0.ACLR
reset1 => score1[2]~reg0.ACLR
reset1 => score1[1]~reg0.ACLR
reset1 => score1[0]~reg0.ACLR
reset1 => score2[7]~reg0.ACLR
reset1 => score2[6]~reg0.ACLR
reset1 => score2[5]~reg0.ACLR
reset1 => score2[4]~reg0.PRESET
reset1 => score2[3]~reg0.ACLR
reset1 => score2[2]~reg0.ACLR
reset1 => score2[1]~reg0.ACLR
reset1 => score2[0]~reg0.ACLR
reset1 => score3[7]~reg0.ACLR
reset1 => score3[6]~reg0.ACLR
reset1 => score3[5]~reg0.ACLR
reset1 => score3[4]~reg0.PRESET
reset1 => score3[3]~reg0.ACLR
reset1 => score3[2]~reg0.ACLR
reset1 => score3[1]~reg0.ACLR
reset1 => score3[0]~reg0.ACLR
reset1 => score4[7]~reg0.ACLR
reset1 => score4[6]~reg0.ACLR
reset1 => score4[5]~reg0.ACLR
reset1 => score4[4]~reg0.PRESET
reset1 => score4[3]~reg0.ACLR
reset1 => score4[2]~reg0.ACLR
reset1 => score4[1]~reg0.ACLR
reset1 => score4[0]~reg0.ACLR
reset1 => flag~6.IN0
reset1 => score1[7]~reg0.ACLR
result1 => always0~0.IN1
result2 => always0~1.IN1
result3 => always0~2.IN1
result4 => always0~3.IN1
score1[0] <= score1[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score1[1] <= score1[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score1[2] <= score1[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score1[3] <= score1[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score1[4] <= score1[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score1[5] <= score1[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score1[6] <= score1[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score1[7] <= score1[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score2[0] <= score2[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score2[1] <= score2[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score2[2] <= score2[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score2[3] <= score2[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score2[4] <= score2[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score2[5] <= score2[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score2[6] <= score2[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score2[7] <= score2[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score3[0] <= score3[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score3[1] <= score3[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score3[2] <= score3[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score3[3] <= score3[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score3[4] <= score3[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score3[5] <= score3[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score3[6] <= score3[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score3[7] <= score3[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score4[0] <= score4[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score4[1] <= score4[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score4[2] <= score4[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score4[3] <= score4[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score4[4] <= score4[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score4[5] <= score4[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score4[6] <= score4[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
score4[7] <= score4[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE