hh.hif

用VHDL 语言描述频率计的设计

Version 5.1 Build 176 10/26/2005 SJ Full Version
33
1688
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
# entity
hh
# storage
db|hh.(0).cnf
db|hh.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
hh.vhd
9397e309e41b7f489c31ffe0dbbca
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# entity
TESTFRE
# storage
db|hh.(1).cnf
db|hh.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
TESTFRE.vhd
e07443a3ee385b78a6569ec3a80176f
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
TESTFRE:T
}
# end
# entity
CNT10
# storage
db|hh.(2).cnf
db|hh.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
CNT10.vhd
87b6b2a2b9fe5d6b2185a7638c4be9a
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
 constraint(outx)
3 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
CNT10:C0
CNT10:C1
CNT10:C2
CNT10:C3
CNT10:C4
}
# end
# entity
REG4
# storage
db|hh.(3).cnf
db|hh.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
REG4.vhd
c54142e6861e548d2a6cd6bf9551480
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
 constraint(din)
3 downto 0
PARAMETER_STRING
USR
 constraint(dout)
3 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
REG4:R1
REG4:R2
REG4:R3
REG4:R4
}
# end
# entity
SM
# storage
db|hh.(4).cnf
db|hh.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
SM.vhd
6ddc429114324e3e9d5edebaba1469c
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
 constraint(i)
3 downto 0
PARAMETER_STRING
USR
 constraint(o)
7 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
SM:SM1
SM:SM2
SM:SM3
SM:SM4
}
# end
# complete