cnt10.map.summary

用VHDL 语言描述频率计的设计

Analysis & Synthesis Status : Successful - Tue Jun 12 15:26:56 2007
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : CNT10
Top-level Entity Name : CNT10
Family : Cyclone
Total logic elements : 5
Total pins : 8
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0